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Achin Gupta7c88f3f2014-02-18 18:09:12 +00001/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Achin Gupta7c88f3f2014-02-18 18:09:12 +000031#include <bl_common.h>
32#include <console.h>
Dan Handley4fd2f5c2014-08-04 11:41:20 +010033#include <platform_tsp.h>
34#include "../fvp_def.h"
35#include "../fvp_private.h"
Achin Gupta7c88f3f2014-02-18 18:09:12 +000036
37/*******************************************************************************
38 * Declarations of linker defined symbols which will help us find the layout
39 * of trusted SRAM
40 ******************************************************************************/
41extern unsigned long __RO_START__;
42extern unsigned long __RO_END__;
43
44extern unsigned long __COHERENT_RAM_START__;
45extern unsigned long __COHERENT_RAM_END__;
46
47/*
48 * The next 2 constants identify the extents of the code & RO data region.
49 * These addresses are used by the MMU setup code and therefore they must be
50 * page-aligned. It is the responsibility of the linker script to ensure that
51 * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
52 */
53#define BL32_RO_BASE (unsigned long)(&__RO_START__)
54#define BL32_RO_LIMIT (unsigned long)(&__RO_END__)
55
56/*
57 * The next 2 constants identify the extents of the coherent memory region.
58 * These addresses are used by the MMU setup code and therefore they must be
59 * page-aligned. It is the responsibility of the linker script to ensure that
60 * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
61 * page-aligned addresses.
62 */
63#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
64#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
65
Achin Gupta7c88f3f2014-02-18 18:09:12 +000066/*******************************************************************************
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010067 * Initialize the UART
Achin Gupta7c88f3f2014-02-18 18:09:12 +000068 ******************************************************************************/
Dan Handley4fd2f5c2014-08-04 11:41:20 +010069void tsp_early_platform_setup(void)
Achin Gupta7c88f3f2014-02-18 18:09:12 +000070{
Vikram Kanigiri3684abf2014-03-27 14:33:15 +000071 /*
72 * Initialize a different console than already in use to display
73 * messages from TSP
74 */
Soby Mathew69817f72014-07-14 15:43:21 +010075 console_init(PL011_UART1_BASE, PL011_UART1_CLK_IN_HZ, PL011_BAUDRATE);
Achin Gupta76717892014-05-09 11:42:56 +010076
77 /* Initialize the platform config for future decision making */
Dan Handleyea451572014-05-15 14:53:30 +010078 fvp_config_setup();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000079}
80
81/*******************************************************************************
Vikram Kanigiri3684abf2014-03-27 14:33:15 +000082 * Perform platform specific setup placeholder
Achin Gupta7c88f3f2014-02-18 18:09:12 +000083 ******************************************************************************/
Dan Handley4fd2f5c2014-08-04 11:41:20 +010084void tsp_platform_setup(void)
Achin Gupta7c88f3f2014-02-18 18:09:12 +000085{
Dan Handleyfb42b122014-06-20 09:43:15 +010086 fvp_gic_init();
Achin Gupta7c88f3f2014-02-18 18:09:12 +000087}
88
89/*******************************************************************************
90 * Perform the very early platform specific architectural setup here. At the
91 * moment this is only intializes the MMU
92 ******************************************************************************/
Dan Handley4fd2f5c2014-08-04 11:41:20 +010093void tsp_plat_arch_setup(void)
Achin Gupta7c88f3f2014-02-18 18:09:12 +000094{
Dan Handleyea451572014-05-15 14:53:30 +010095 fvp_configure_mmu_el1(BL32_RO_BASE,
96 (BL32_COHERENT_RAM_LIMIT - BL32_RO_BASE),
97 BL32_RO_BASE,
98 BL32_RO_LIMIT,
99 BL32_COHERENT_RAM_BASE,
100 BL32_COHERENT_RAM_LIMIT);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000101}