Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 1 | # |
Bharat Gooty | d9ff1ca | 2020-09-24 13:02:39 +0530 | [diff] [blame] | 2 | # Copyright (c) 2019-2021, Broadcom |
Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 7 | # Set the toc_flags to 1 for 100% speed operation |
| 8 | # Set the toc_flags to 2 for 50% speed operation |
| 9 | # Set the toc_flags to 3 for 25% speed operation |
| 10 | # Set the toc_flags bit 3 to indicate ignore the fip in UEFI copy mode |
| 11 | PLAT_TOC_FLAGS := 0x0 |
| 12 | |
| 13 | # Set the IHOST_PLL_FREQ to, |
| 14 | # 1 for full speed |
| 15 | # 2 for 50% speed |
| 16 | # 3 for 25% speed |
| 17 | # 0 for bypass |
| 18 | $(eval $(call add_define_val,IHOST_PLL_FREQ,1)) |
| 19 | |
Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 20 | # Enable workaround for ERRATA_A72_859971 |
| 21 | ERRATA_A72_859971 := 1 |
| 22 | |
| 23 | # Cache Coherency Interconnect Driver needed |
| 24 | DRIVER_CC_ENABLE := 1 |
| 25 | $(eval $(call add_define,DRIVER_CC_ENABLE)) |
| 26 | |
Sheetal Tigadoli | b015670 | 2020-01-05 14:59:04 +0530 | [diff] [blame] | 27 | # Enable to erase eMMC |
| 28 | INCLUDE_EMMC_DRIVER_ERASE_CODE := 0 |
| 29 | |
| 30 | ifeq (${INCLUDE_EMMC_DRIVER_ERASE_CODE},1) |
| 31 | $(eval $(call add_define,INCLUDE_EMMC_DRIVER_ERASE_CODE)) |
| 32 | endif |
| 33 | |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 34 | # BL31 is in DRAM |
| 35 | ARM_BL31_IN_DRAM := 1 |
| 36 | |
Sheetal Tigadoli | 58a9eca | 2019-12-18 20:05:09 +0530 | [diff] [blame] | 37 | ifneq (${USE_EMULATOR},yes) |
| 38 | STINGRAY_EMULATION_SETUP := 0 |
| 39 | ifeq (${FASTBOOT_TYPE},) |
| 40 | override FASTBOOT_TYPE := 0 |
| 41 | endif |
| 42 | USE_PAXB := yes |
| 43 | USE_PAXC := yes |
| 44 | USE_CHIMP := yes |
| 45 | endif |
| 46 | |
Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 47 | USE_CRMU_SRAM := yes |
| 48 | |
Sheetal Tigadoli | 58a9eca | 2019-12-18 20:05:09 +0530 | [diff] [blame] | 49 | # Disable FS4 clocks - they can be reenabled when needed by linux |
| 50 | FS4_DISABLE_CLOCK := yes |
| 51 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 52 | # Enable error logging by default for Stingray |
| 53 | BCM_ELOG := yes |
| 54 | |
| 55 | # Enable FRU support by default for Stingray |
| 56 | ifeq (${USE_FRU},) |
| 57 | USE_FRU := no |
| 58 | endif |
| 59 | |
Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 60 | # Use single cluster |
| 61 | ifeq (${USE_SINGLE_CLUSTER},yes) |
| 62 | $(info Using Single Cluster) |
| 63 | $(eval $(call add_define,USE_SINGLE_CLUSTER)) |
| 64 | endif |
| 65 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 66 | # Use DDR |
| 67 | ifeq (${USE_DDR},yes) |
| 68 | $(info Using DDR) |
| 69 | $(eval $(call add_define,USE_DDR)) |
| 70 | endif |
| 71 | |
Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 72 | ifeq (${BOARD_CFG},) |
Max Shvetsov | b247d2f | 2020-04-06 11:32:38 +0100 | [diff] [blame] | 73 | BOARD_CFG := bcm958742t |
Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 74 | endif |
| 75 | |
Bharat Gooty | 29e3eb9 | 2020-09-24 15:29:28 +0530 | [diff] [blame] | 76 | # Use USB |
| 77 | ifeq (${USE_USB},yes) |
| 78 | $(info Using USB) |
| 79 | $(eval $(call add_define,USE_USB)) |
| 80 | endif |
| 81 | |
Sheetal Tigadoli | 58a9eca | 2019-12-18 20:05:09 +0530 | [diff] [blame] | 82 | # Use PAXB |
| 83 | ifeq (${USE_PAXB},yes) |
| 84 | $(info Using PAXB) |
| 85 | $(eval $(call add_define,USE_PAXB)) |
| 86 | endif |
| 87 | |
| 88 | # Use FS4 |
| 89 | ifeq (${USE_FS4},yes) |
| 90 | $(info Using FS4) |
| 91 | $(eval $(call add_define,USE_FS4)) |
| 92 | endif |
| 93 | |
| 94 | # Use FS6 |
| 95 | ifeq (${USE_FS6},yes) |
| 96 | $(info Using FS6) |
| 97 | $(eval $(call add_define,USE_FS6)) |
| 98 | endif |
| 99 | |
| 100 | # Disable FS4 clock |
| 101 | ifeq (${FS4_DISABLE_CLOCK},yes) |
| 102 | $(info Using FS4_DISABLE_CLOCK) |
| 103 | $(eval $(call add_define,FS4_DISABLE_CLOCK)) |
| 104 | endif |
| 105 | |
| 106 | ifneq (${NCSI_IO_DRIVE_STRENGTH_MA},) |
| 107 | $(info Using NCSI_IO_DRIVE_STRENGTH_MA) |
| 108 | $(eval $(call add_define,NCSI_IO_DRIVE_STRENGTH_MA)) |
| 109 | endif |
| 110 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 111 | # Use NAND |
| 112 | ifeq (${USE_NAND},$(filter yes, ${USE_NAND})) |
| 113 | $(info Using NAND) |
| 114 | $(eval $(call add_define,USE_NAND)) |
| 115 | endif |
| 116 | |
| 117 | # Enable Broadcom error logging support |
| 118 | ifeq (${BCM_ELOG},yes) |
| 119 | $(info Using BCM_ELOG) |
| 120 | $(eval $(call add_define,BCM_ELOG)) |
| 121 | endif |
| 122 | |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 123 | # BL31 build for standalone mode |
| 124 | ifeq (${STANDALONE_BL31},yes) |
| 125 | RESET_TO_BL31 := 1 |
| 126 | $(info Using RESET_TO_BL31) |
| 127 | endif |
| 128 | |
Sheetal Tigadoli | 58a9eca | 2019-12-18 20:05:09 +0530 | [diff] [blame] | 129 | # BL31 force full frequency for all CPUs |
| 130 | ifeq (${BL31_FORCE_CPU_FULL_FREQ},yes) |
| 131 | $(info Using BL31_FORCE_CPU_FULL_FREQ) |
| 132 | $(eval $(call add_define,BL31_FORCE_CPU_FULL_FREQ)) |
| 133 | endif |
| 134 | |
| 135 | # Enable non-secure accesses to CCN registers |
| 136 | ifeq (${BL31_CCN_NONSECURE},yes) |
| 137 | $(info Using BL31_CCN_NONSECURE) |
| 138 | $(eval $(call add_define,BL31_CCN_NONSECURE)) |
| 139 | endif |
| 140 | |
| 141 | # Use ChiMP |
| 142 | ifeq (${USE_CHIMP},yes) |
| 143 | $(info Using ChiMP) |
| 144 | $(eval $(call add_define,USE_CHIMP)) |
| 145 | endif |
| 146 | |
| 147 | # Use PAXC |
| 148 | ifeq (${USE_PAXC},yes) |
| 149 | $(info Using PAXC) |
| 150 | $(eval $(call add_define,USE_PAXC)) |
| 151 | ifeq (${CHIMPFW_USE_SIDELOAD},yes) |
| 152 | $(info Using ChiMP FW sideload) |
| 153 | $(eval $(call add_define,CHIMPFW_USE_SIDELOAD)) |
| 154 | endif |
| 155 | $(eval $(call add_define,FASTBOOT_TYPE)) |
| 156 | $(eval $(call add_define,CHIMP_FB1_ENTRY)) |
| 157 | endif |
| 158 | |
| 159 | ifeq (${DEFAULT_SWREG_CONFIG}, 1) |
| 160 | $(eval $(call add_define,DEFAULT_SWREG_CONFIG)) |
| 161 | endif |
| 162 | |
| 163 | ifeq (${CHIMP_ALWAYS_NEEDS_QSPI},yes) |
| 164 | $(eval $(call add_define,CHIMP_ALWAYS_NEEDS_QSPI)) |
| 165 | endif |
| 166 | |
Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 167 | # For testing purposes, use memsys stubs. Remove once memsys is fully tested. |
| 168 | USE_MEMSYS_STUBS := yes |
| 169 | |
| 170 | # Default, use BL1_RW area |
| 171 | ifneq (${BL2_USE_BL1_RW},no) |
| 172 | $(eval $(call add_define,USE_BL1_RW)) |
| 173 | endif |
| 174 | |
| 175 | # Default soft reset is L3 |
| 176 | $(eval $(call add_define,CONFIG_SOFT_RESET_L3)) |
| 177 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 178 | # Enable Chip OTP driver |
| 179 | DRIVER_OCOTP_ENABLE := 1 |
| 180 | |
Sheetal Tigadoli | 3bb1b4c | 2020-01-05 21:19:02 +0530 | [diff] [blame] | 181 | ifneq (${WARMBOOT_DDR_S3_SUPPORT},) |
| 182 | DRIVER_SPI_ENABLE := 1 |
| 183 | endif |
| 184 | |
Sheetal Tigadoli | 13680c9 | 2019-12-13 10:39:06 +0530 | [diff] [blame] | 185 | include plat/brcm/board/common/board_common.mk |
| 186 | |
| 187 | SOC_DIR := brcm/board/stingray |
| 188 | |
| 189 | PLAT_INCLUDES += -Iplat/${SOC_DIR}/include/ \ |
| 190 | -Iinclude/plat/brcm/common/ \ |
| 191 | -Iplat/brcm/common/ |
| 192 | |
| 193 | PLAT_BL_COMMON_SOURCES += lib/cpus/aarch64/cortex_a72.S \ |
| 194 | plat/${SOC_DIR}/aarch64/plat_helpers.S \ |
| 195 | drivers/ti/uart/aarch64/16550_console.S \ |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 196 | plat/${SOC_DIR}/src/tz_sec.c \ |
| 197 | drivers/arm/tzc/tzc400.c \ |
Sheetal Tigadoli | b015670 | 2020-01-05 14:59:04 +0530 | [diff] [blame] | 198 | plat/${SOC_DIR}/driver/plat_emmc.c \ |
Bharat Gooty | d9ff1ca | 2020-09-24 13:02:39 +0530 | [diff] [blame] | 199 | plat/${SOC_DIR}/src/topology.c \ |
| 200 | drivers/brcm/mdio/mdio.c |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 201 | |
Sheetal Tigadoli | 58a9eca | 2019-12-18 20:05:09 +0530 | [diff] [blame] | 202 | ifeq (${USE_CHIMP},yes) |
| 203 | PLAT_BL_COMMON_SOURCES += drivers/brcm/chimp.c |
| 204 | endif |
| 205 | |
Bharat Gooty | 29e3eb9 | 2020-09-24 15:29:28 +0530 | [diff] [blame] | 206 | ifeq (${USE_USB},yes) |
| 207 | PLAT_BL_COMMON_SOURCES += plat/${SOC_DIR}/driver/usb.c \ |
| 208 | plat/${SOC_DIR}/driver/usb_phy.c |
| 209 | endif |
| 210 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 211 | BL2_SOURCES += plat/${SOC_DIR}/driver/ihost_pll_config.c \ |
| 212 | plat/${SOC_DIR}/src/bl2_setup.c \ |
Jayanth Dodderi Chidanand | 4e89de2 | 2023-06-23 23:36:01 +0100 | [diff] [blame^] | 213 | plat/${SOC_DIR}/driver/swreg.c \ |
| 214 | lib/cpus/aarch64/cpu_helpers.S |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 215 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 216 | ifeq (${USE_DDR},yes) |
| 217 | PLAT_INCLUDES += -Iplat/${SOC_DIR}/driver/ddr/soc/include |
| 218 | else |
| 219 | PLAT_INCLUDES += -Iplat/${SOC_DIR}/driver/ext_sram_init |
| 220 | BL2_SOURCES += plat/${SOC_DIR}/driver/ext_sram_init/ext_sram_init.c |
| 221 | endif |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 222 | |
| 223 | # Include GICv3 driver files |
| 224 | include drivers/arm/gic/v3/gicv3.mk |
| 225 | |
| 226 | BRCM_GIC_SOURCES := ${GICV3_SOURCES} \ |
| 227 | plat/common/plat_gicv3.c \ |
| 228 | plat/brcm/common/brcm_gicv3.c |
| 229 | |
| 230 | BL31_SOURCES += \ |
| 231 | drivers/arm/ccn/ccn.c \ |
| 232 | plat/brcm/board/common/timer_sync.c \ |
| 233 | plat/brcm/common/brcm_ccn.c \ |
| 234 | plat/common/plat_psci_common.c \ |
| 235 | plat/${SOC_DIR}/driver/ihost_pll_config.c \ |
Sheetal Tigadoli | 58a9eca | 2019-12-18 20:05:09 +0530 | [diff] [blame] | 236 | plat/${SOC_DIR}/src/bl31_setup.c \ |
| 237 | plat/${SOC_DIR}/src/fsx.c \ |
| 238 | plat/${SOC_DIR}/src/iommu.c \ |
| 239 | plat/${SOC_DIR}/src/sdio.c \ |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 240 | ${BRCM_GIC_SOURCES} |
| 241 | |
Sheetal Tigadoli | 58a9eca | 2019-12-18 20:05:09 +0530 | [diff] [blame] | 242 | ifneq (${NCSI_IO_DRIVE_STRENGTH_MA},) |
| 243 | BL31_SOURCES += plat/${SOC_DIR}/src/ncsi.c |
| 244 | endif |
| 245 | |
| 246 | ifeq (${USE_PAXB},yes) |
| 247 | BL31_SOURCES += plat/${SOC_DIR}/src/paxb.c |
| 248 | BL31_SOURCES += plat/${SOC_DIR}/src/sr_paxb_phy.c |
| 249 | endif |
| 250 | |
| 251 | ifeq (${USE_PAXC},yes) |
| 252 | BL31_SOURCES += plat/${SOC_DIR}/src/paxc.c |
| 253 | endif |
| 254 | |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 255 | ifdef SCP_BL2 |
| 256 | PLAT_INCLUDES += -Iplat/brcm/common/ |
| 257 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 258 | BL2_SOURCES += plat/brcm/common/brcm_mhu.c \ |
| 259 | plat/brcm/common/brcm_scpi.c \ |
| 260 | plat/${SOC_DIR}/src/scp_utils.c \ |
| 261 | plat/${SOC_DIR}/src/scp_cmd.c \ |
| 262 | drivers/brcm/scp.c |
| 263 | |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 264 | BL31_SOURCES += plat/brcm/common/brcm_mhu.c \ |
| 265 | plat/brcm/common/brcm_scpi.c \ |
| 266 | plat/${SOC_DIR}/src/brcm_pm_ops.c |
| 267 | else |
| 268 | BL31_SOURCES += plat/${SOC_DIR}/src/ihost_pm.c \ |
| 269 | plat/${SOC_DIR}/src/pm.c |
| 270 | endif |
| 271 | |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 272 | ifeq (${ELOG_SUPPORT},1) |
| 273 | ifeq (${ELOG_STORE_MEDIA},DDR) |
| 274 | BL2_SOURCES += plat/brcm/board/common/bcm_elog_ddr.c |
| 275 | endif |
| 276 | endif |
| 277 | |
Sheetal Tigadoli | 58a9eca | 2019-12-18 20:05:09 +0530 | [diff] [blame] | 278 | ifeq (${BL31_BOOT_PRELOADED_SCP}, 1) |
| 279 | ifdef SCP_BL2 |
| 280 | SCP_CFG_DIR=$(dir ${SCP_BL2}) |
| 281 | PLAT_INCLUDES += -I${SCP_CFG_DIR} |
| 282 | endif |
| 283 | PLAT_INCLUDES += -Iplat/brcm/common/ |
| 284 | |
| 285 | # By default use OPTEE Assigned memory |
| 286 | PRELOADED_SCP_BASE ?= 0x8E000000 |
| 287 | PRELOADED_SCP_SIZE ?= 0x10000 |
| 288 | $(eval $(call add_define,PRELOADED_SCP_BASE)) |
| 289 | $(eval $(call add_define,PRELOADED_SCP_SIZE)) |
| 290 | $(eval $(call add_define,BL31_BOOT_PRELOADED_SCP)) |
| 291 | BL31_SOURCES += plat/${SOC_DIR}/src/scp_utils.c \ |
| 292 | plat/${SOC_DIR}/src/scp_cmd.c \ |
| 293 | drivers/brcm/scp.c |
| 294 | endif |
| 295 | |
Sheetal Tigadoli | 2a96dc2 | 2019-12-18 12:01:01 +0530 | [diff] [blame] | 296 | # Do not execute the startup code on warm reset. |
| 297 | PROGRAMMABLE_RESET_ADDRESS := 1 |
Sheetal Tigadoli | ad0943e | 2019-12-18 19:44:43 +0530 | [diff] [blame] | 298 | |
| 299 | # Nitro FW, config and Crash log uses secure DDR memory |
| 300 | # Inaddition to above, Nitro master and slave is also secure |
| 301 | ifneq ($(NITRO_SECURE_ACCESS),) |
| 302 | $(eval $(call add_define,NITRO_SECURE_ACCESS)) |
| 303 | $(eval $(call add_define,DDR_NITRO_SECURE_REGION_START)) |
| 304 | $(eval $(call add_define,DDR_NITRO_SECURE_REGION_END)) |
| 305 | endif |