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Tony Xief6118cc2016-01-15 17:17:32 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Tony Xief6118cc2016-01-15 17:17:32 +08005 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <platform_def.h>
Tony Xief6118cc2016-01-15 17:17:32 +080010
Lin Huang30e43392017-05-04 16:02:45 +080011 .globl pmu_cpuson_entrypoint
12 .macro pmusram_entry_func _name
13 .section .pmusram.entry, "ax"
14 .type \_name, %function
15 .func \_name
16 .cfi_startproc
17 \_name:
18 .endm
Tony Xief6118cc2016-01-15 17:17:32 +080019
Lin Huang30e43392017-05-04 16:02:45 +080020pmusram_entry_func pmu_cpuson_entrypoint
21
Lin Huang2a6df222017-05-12 10:26:32 +080022#if PSRAM_CHECK_WAKEUP_CPU
23check_wake_cpus:
24 mrs x0, MPIDR_EL1
25 and x1, x0, #MPIDR_CPU_MASK
26 and x0, x0, #MPIDR_CLUSTER_MASK
27 orr x0, x0, x1
28
29 /* primary_cpu */
30 ldr w1, boot_mpidr
31 cmp w0, w1
32 b.eq sys_wakeup
33
34 /*
35 * If the core is not the primary cpu,
36 * force the core into wfe.
37 */
38wfe_loop:
39 wfe
40 b wfe_loop
41sys_wakeup:
42#endif
43
Lin Huang30e43392017-05-04 16:02:45 +080044#if PSRAM_DO_DDR_RESUME
Tony Xief6118cc2016-01-15 17:17:32 +080045ddr_resume:
Lin Huang30e43392017-05-04 16:02:45 +080046 ldr x2, =__bl31_sram_stack_end
47 mov sp, x2
Lin Huang1f8fdeb2017-05-17 16:14:37 +080048 bl dmc_resume
Lin Huang30e43392017-05-04 16:02:45 +080049#endif
Lin Huang88dd1232017-05-16 16:40:46 +080050 bl sram_restore
Lin Huang30e43392017-05-04 16:02:45 +080051sys_resume:
52 bl psci_entrypoint
Tony Xief6118cc2016-01-15 17:17:32 +080053endfunc pmu_cpuson_entrypoint