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Harry Liebelcef93392014-04-01 19:27:38 +01001/*
2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <assert.h>
Dan Handley714a0d22014-04-09 13:13:04 +010032#include <debug.h>
Dan Handley1c54d972014-06-20 12:02:01 +010033#include <plat_config.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010034#include <tzc400.h>
35#include "fvp_def.h"
36#include "fvp_private.h"
Harry Liebelcef93392014-04-01 19:27:38 +010037
38/* Used to improve readability for configuring regions. */
39#define FILTER_SHIFT(filter) (1 << filter)
40
41/*
42 * For the moment we assume that all security programming is done by the
43 * primary core.
44 * TODO:
45 * Might want to enable interrupt on violations when supported?
46 */
Dan Handleyea451572014-05-15 14:53:30 +010047void fvp_security_setup(void)
Harry Liebelcef93392014-04-01 19:27:38 +010048{
Dan Handleye2712bc2014-04-10 15:37:22 +010049 tzc_instance_t controller;
Harry Liebelcef93392014-04-01 19:27:38 +010050
51 /*
52 * The Base FVP has a TrustZone address space controller, the Foundation
53 * FVP does not. Trying to program the device on the foundation FVP will
54 * cause an abort.
55 *
56 * If the platform had additional peripheral specific security
57 * configurations, those would be configured here.
58 */
59
Dan Handley1c54d972014-06-20 12:02:01 +010060 if (!(get_plat_config()->flags & CONFIG_HAS_TZC))
Harry Liebelcef93392014-04-01 19:27:38 +010061 return;
62
63 /*
64 * The TrustZone controller controls access to main DRAM. Give
65 * full NS access for the moment to use with OS.
66 */
67 INFO("Configuring TrustZone Controller\n");
68
69 /*
70 * The driver does some error checking and will assert.
71 * - Provide base address of device on platform.
72 * - Provide width of ACE-Lite IDs on platform.
73 */
74 controller.base = TZC400_BASE;
75 controller.aid_width = FVP_AID_WIDTH;
76 tzc_init(&controller);
77
78 /*
79 * Currently only filters 0 and 2 are connected on Base FVP.
80 * Filter 0 : CPU clusters (no access to DRAM by default)
81 * Filter 1 : not connected
82 * Filter 2 : LCDs (access to VRAM allowed by default)
83 * Filter 3 : not connected
84 * Programming unconnected filters will have no effect at the
85 * moment. These filter could, however, be connected in future.
86 * So care should be taken not to configure the unused filters.
87 */
88
89 /* Disable all filters before programming. */
90 tzc_disable_filters(&controller);
91
92 /*
Andrew Thoelkefe3374b2014-05-09 15:36:13 +010093 * Allow only non-secure access to all DRAM to supported devices.
94 * Give access to the CPUs and Virtio. Some devices
Harry Liebelcef93392014-04-01 19:27:38 +010095 * would normally use the default ID so allow that too. We use
Andrew Thoelkefe3374b2014-05-09 15:36:13 +010096 * two regions to cover the blocks of physical memory in the FVPs.
97 *
98 * Software executing in the secure state, such as a secure
99 * boot-loader, can access the DRAM by using the NS attributes in
100 * the MMU translation tables and descriptors.
Harry Liebelcef93392014-04-01 19:27:38 +0100101 */
102
Andrew Thoelkefe3374b2014-05-09 15:36:13 +0100103 /* Set to cover the first block of DRAM */
Harry Liebelcef93392014-04-01 19:27:38 +0100104 tzc_configure_region(&controller, FILTER_SHIFT(0), 1,
Juan Castillo7055ca42014-05-16 15:33:15 +0100105 DRAM1_BASE, DRAM1_END - DRAM1_SEC_SIZE,
106 TZC_REGION_S_NONE,
Harry Liebelcef93392014-04-01 19:27:38 +0100107 TZC_REGION_ACCESS_RDWR(FVP_NSAID_DEFAULT) |
Andrew Thoelkefe3374b2014-05-09 15:36:13 +0100108 TZC_REGION_ACCESS_RDWR(FVP_NSAID_PCI) |
109 TZC_REGION_ACCESS_RDWR(FVP_NSAID_AP) |
110 TZC_REGION_ACCESS_RDWR(FVP_NSAID_VIRTIO) |
111 TZC_REGION_ACCESS_RDWR(FVP_NSAID_VIRTIO_OLD));
Harry Liebelcef93392014-04-01 19:27:38 +0100112
Juan Castillo7055ca42014-05-16 15:33:15 +0100113 /* Set to cover the secure reserved region */
114 tzc_configure_region(&controller, FILTER_SHIFT(0), 3,
115 (DRAM1_END - DRAM1_SEC_SIZE) + 1 , DRAM1_END,
116 TZC_REGION_S_RDWR,
117 0x0);
118
Andrew Thoelkefe3374b2014-05-09 15:36:13 +0100119 /* Set to cover the second block of DRAM */
Harry Liebelcef93392014-04-01 19:27:38 +0100120 tzc_configure_region(&controller, FILTER_SHIFT(0), 2,
Juan Castillo7055ca42014-05-16 15:33:15 +0100121 DRAM2_BASE, DRAM2_END, TZC_REGION_S_NONE,
Harry Liebelcef93392014-04-01 19:27:38 +0100122 TZC_REGION_ACCESS_RDWR(FVP_NSAID_DEFAULT) |
Andrew Thoelkefe3374b2014-05-09 15:36:13 +0100123 TZC_REGION_ACCESS_RDWR(FVP_NSAID_PCI) |
Harry Liebelcef93392014-04-01 19:27:38 +0100124 TZC_REGION_ACCESS_RDWR(FVP_NSAID_AP) |
Andrew Thoelkefe3374b2014-05-09 15:36:13 +0100125 TZC_REGION_ACCESS_RDWR(FVP_NSAID_VIRTIO) |
126 TZC_REGION_ACCESS_RDWR(FVP_NSAID_VIRTIO_OLD));
Harry Liebelcef93392014-04-01 19:27:38 +0100127
128 /*
129 * TODO: Interrupts are not currently supported. The only
130 * options we have are for access errors to occur quietly or to
131 * cause an exception. We choose to cause an exception.
132 */
133 tzc_set_action(&controller, TZC_ACTION_ERR);
134
135 /* Enable filters. */
136 tzc_enable_filters(&controller);
137}