Achin Gupta | 7c88f3f | 2014-02-18 18:09:12 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Achin Gupta | 7c88f3f | 2014-02-18 18:09:12 +0000 | [diff] [blame] | 31 | #include <arch_helpers.h> |
Achin Gupta | 7c88f3f | 2014-02-18 18:09:12 +0000 | [diff] [blame] | 32 | #include <bl_common.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 33 | #include <bl32.h> |
Achin Gupta | 7c88f3f | 2014-02-18 18:09:12 +0000 | [diff] [blame] | 34 | #include <console.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 35 | #include <platform.h> |
Achin Gupta | 7c88f3f | 2014-02-18 18:09:12 +0000 | [diff] [blame] | 36 | |
| 37 | /******************************************************************************* |
| 38 | * Declarations of linker defined symbols which will help us find the layout |
| 39 | * of trusted SRAM |
| 40 | ******************************************************************************/ |
| 41 | extern unsigned long __RO_START__; |
| 42 | extern unsigned long __RO_END__; |
| 43 | |
| 44 | extern unsigned long __COHERENT_RAM_START__; |
| 45 | extern unsigned long __COHERENT_RAM_END__; |
| 46 | |
| 47 | /* |
| 48 | * The next 2 constants identify the extents of the code & RO data region. |
| 49 | * These addresses are used by the MMU setup code and therefore they must be |
| 50 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 51 | * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. |
| 52 | */ |
| 53 | #define BL32_RO_BASE (unsigned long)(&__RO_START__) |
| 54 | #define BL32_RO_LIMIT (unsigned long)(&__RO_END__) |
| 55 | |
| 56 | /* |
| 57 | * The next 2 constants identify the extents of the coherent memory region. |
| 58 | * These addresses are used by the MMU setup code and therefore they must be |
| 59 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 60 | * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to |
| 61 | * page-aligned addresses. |
| 62 | */ |
| 63 | #define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) |
| 64 | #define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) |
| 65 | |
| 66 | /* Data structure which holds the extents of the trusted SRAM for BL32 */ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 67 | static meminfo_t bl32_tzdram_layout |
Achin Gupta | 7c88f3f | 2014-02-18 18:09:12 +0000 | [diff] [blame] | 68 | __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), |
| 69 | section("tzfw_coherent_mem"))); |
| 70 | |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 71 | meminfo_t *bl32_plat_sec_mem_layout(void) |
Achin Gupta | 7c88f3f | 2014-02-18 18:09:12 +0000 | [diff] [blame] | 72 | { |
| 73 | return &bl32_tzdram_layout; |
| 74 | } |
| 75 | |
| 76 | /******************************************************************************* |
| 77 | * BL1 has passed the extents of the trusted SRAM that's at BL32's disposal. |
| 78 | * Initialize the BL32 data structure with the memory extends |
| 79 | ******************************************************************************/ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 80 | void bl32_early_platform_setup(meminfo_t *mem_layout, |
Achin Gupta | 7c88f3f | 2014-02-18 18:09:12 +0000 | [diff] [blame] | 81 | void *data) |
| 82 | { |
| 83 | /* Setup the BL32 memory layout */ |
| 84 | bl32_tzdram_layout.total_base = mem_layout->total_base; |
| 85 | bl32_tzdram_layout.total_size = mem_layout->total_size; |
| 86 | bl32_tzdram_layout.free_base = mem_layout->free_base; |
| 87 | bl32_tzdram_layout.free_size = mem_layout->free_size; |
| 88 | bl32_tzdram_layout.attr = mem_layout->attr; |
| 89 | bl32_tzdram_layout.next = 0; |
| 90 | |
| 91 | return; |
| 92 | } |
| 93 | |
| 94 | /******************************************************************************* |
| 95 | * Perform platform specific setup |
| 96 | ******************************************************************************/ |
| 97 | void bl32_platform_setup() |
| 98 | { |
| 99 | /* |
| 100 | * Initialize a different console than already in use to display |
| 101 | * messages from TSP |
| 102 | */ |
| 103 | console_init(PL011_UART1_BASE); |
| 104 | } |
| 105 | |
| 106 | /******************************************************************************* |
| 107 | * Perform the very early platform specific architectural setup here. At the |
| 108 | * moment this is only intializes the MMU |
| 109 | ******************************************************************************/ |
| 110 | void bl32_plat_arch_setup() |
| 111 | { |
| 112 | configure_mmu(&bl32_tzdram_layout, |
| 113 | BL32_RO_BASE, |
| 114 | BL32_RO_LIMIT, |
| 115 | BL32_COHERENT_RAM_BASE, |
| 116 | BL32_COHERENT_RAM_LIMIT); |
| 117 | } |