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Harry Liebel43ef4f12013-10-22 17:29:14 +01001/*
Balint Dobszay5ce2c322020-01-10 17:16:27 +01002 * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
Harry Liebel43ef4f12013-10-22 17:29:14 +01003 *
Achin Gupta69387312016-09-26 10:22:56 +01004 * SPDX-License-Identifier: BSD-3-Clause
Harry Liebel43ef4f12013-10-22 17:29:14 +01005 */
6
Alexei Fedorov4348f492020-05-13 21:13:57 +01007/* Configuration: 1 cluster with up to 4 CPUs */
8
Harry Liebel43ef4f12013-10-22 17:29:14 +01009/dts-v1/;
10
Alexei Fedorov4348f492020-05-13 21:13:57 +010011#define AFF
12#define CLUSTER_COUNT 1
13
14#include "fvp-defs.dtsi"
15
Harry Liebel43ef4f12013-10-22 17:29:14 +010016/memreserve/ 0x80000000 0x00010000;
17
18/ {
19};
20
21/ {
Harry Liebelcef93392014-04-01 19:27:38 +010022 model = "FVP Foundation";
Harry Liebel43ef4f12013-10-22 17:29:14 +010023 compatible = "arm,fvp-base", "arm,vexpress";
24 interrupt-parent = <&gic>;
25 #address-cells = <2>;
26 #size-cells = <2>;
27
28 chosen { };
29
30 aliases {
31 serial0 = &v2m_serial0;
32 serial1 = &v2m_serial1;
33 serial2 = &v2m_serial2;
34 serial3 = &v2m_serial3;
35 };
36
37 psci {
Soby Mathew1df077b2015-01-15 11:49:58 +000038 compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
Harry Liebel43ef4f12013-10-22 17:29:14 +010039 method = "smc";
40 cpu_suspend = <0xc4000001>;
41 cpu_off = <0x84000002>;
42 cpu_on = <0xc4000003>;
Soby Mathewe0f55df2016-10-05 15:38:01 +010043 sys_poweroff = <0x84000008>;
44 sys_reset = <0x84000009>;
Madhukar Pappireddy26b945c2019-12-27 12:02:34 -060045 max-pwr-lvl = <2>;
Harry Liebel43ef4f12013-10-22 17:29:14 +010046 };
47
48 cpus {
49 #address-cells = <2>;
50 #size-cells = <0>;
51
Alexei Fedorov4348f492020-05-13 21:13:57 +010052 CPU_MAP
Achin Gupta5ab4fe42014-08-20 17:33:09 +010053
54 idle-states {
55 entry-method = "arm,psci";
56
57 CPU_SLEEP_0: cpu-sleep-0 {
58 compatible = "arm,idle-state";
Juan Castillo3414f542015-04-16 14:17:49 +010059 local-timer-stop;
60 arm,psci-suspend-param = <0x0010000>;
Achin Gupta5ab4fe42014-08-20 17:33:09 +010061 entry-latency-us = <40>;
62 exit-latency-us = <100>;
63 min-residency-us = <150>;
64 };
65
66 CLUSTER_SLEEP_0: cluster-sleep-0 {
67 compatible = "arm,idle-state";
Juan Castillo3414f542015-04-16 14:17:49 +010068 local-timer-stop;
69 arm,psci-suspend-param = <0x1010000>;
Achin Gupta5ab4fe42014-08-20 17:33:09 +010070 entry-latency-us = <500>;
71 exit-latency-us = <1000>;
72 min-residency-us = <2500>;
73 };
74 };
75
Alexei Fedorov4348f492020-05-13 21:13:57 +010076 CPUS
Antonio Nino Diaz430147a2016-02-22 16:44:41 +000077
78 L2_0: l2-cache0 {
79 compatible = "cache";
Harry Liebel43ef4f12013-10-22 17:29:14 +010080 };
81 };
82
83 memory@80000000 {
84 device_type = "memory";
Juan Castillo7055ca42014-05-16 15:33:15 +010085 reg = <0x00000000 0x80000000 0 0x7F000000>,
Harry Liebel43ef4f12013-10-22 17:29:14 +010086 <0x00000008 0x80000000 0 0x80000000>;
87 };
88
Harry Liebel34988592013-11-11 13:24:47 +000089 gic: interrupt-controller@2f000000 {
Harry Liebel43ef4f12013-10-22 17:29:14 +010090 compatible = "arm,gic-v3";
91 #interrupt-cells = <3>;
Harry Liebel34988592013-11-11 13:24:47 +000092 #address-cells = <2>;
93 #size-cells = <2>;
94 ranges;
Harry Liebel43ef4f12013-10-22 17:29:14 +010095 interrupt-controller;
96 reg = <0x0 0x2f000000 0 0x10000>, // GICD
97 <0x0 0x2f100000 0 0x200000>, // GICR
98 <0x0 0x2c000000 0 0x2000>, // GICC
99 <0x0 0x2c010000 0 0x2000>, // GICH
Harry Liebel34988592013-11-11 13:24:47 +0000100 <0x0 0x2c02f000 0 0x2000>; // GICV
Harry Liebel43ef4f12013-10-22 17:29:14 +0100101 interrupts = <1 9 4>;
Harry Liebel34988592013-11-11 13:24:47 +0000102
103 its: its@2f020000 {
104 compatible = "arm,gic-v3-its";
105 msi-controller;
106 reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
107 };
Harry Liebel43ef4f12013-10-22 17:29:14 +0100108 };
109
110 timer {
111 compatible = "arm,armv8-timer";
112 interrupts = <1 13 0xff01>,
113 <1 14 0xff01>,
114 <1 11 0xff01>,
115 <1 10 0xff01>;
116 clock-frequency = <100000000>;
117 };
118
119 timer@2a810000 {
120 compatible = "arm,armv7-timer-mem";
121 reg = <0x0 0x2a810000 0x0 0x10000>;
122 clock-frequency = <100000000>;
123 #address-cells = <2>;
124 #size-cells = <2>;
125 ranges;
Harry Liebelcef93392014-04-01 19:27:38 +0100126 frame@2a830000 {
127 frame-number = <1>;
128 interrupts = <0 26 4>;
129 reg = <0x0 0x2a830000 0x0 0x10000>;
Harry Liebel43ef4f12013-10-22 17:29:14 +0100130 };
131 };
132
133 pmu {
134 compatible = "arm,armv8-pmuv3";
135 interrupts = <0 60 4>,
136 <0 61 4>,
137 <0 62 4>,
138 <0 63 4>;
139 };
140
141 smb {
142 compatible = "simple-bus";
143
144 #address-cells = <2>;
145 #size-cells = <1>;
146 ranges = <0 0 0 0x08000000 0x04000000>,
147 <1 0 0 0x14000000 0x04000000>,
148 <2 0 0 0x18000000 0x04000000>,
149 <3 0 0 0x1c000000 0x04000000>,
150 <4 0 0 0x0c000000 0x04000000>,
151 <5 0 0 0x10000000 0x04000000>;
152
Balint Dobszay5ce2c322020-01-10 17:16:27 +0100153 #include "fvp-foundation-motherboard.dtsi"
Harry Liebel43ef4f12013-10-22 17:29:14 +0100154 };
155};