Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 1 | # |
| 2 | # Copyright (c) 2017-2018, Arm Limited and Contributors. All rights reserved. |
| 3 | # Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. |
| 4 | # |
| 5 | # SPDX-License-Identifier: BSD-3-Clause |
| 6 | # |
| 7 | |
| 8 | # Make for SC7280 QTI platform. |
| 9 | |
| 10 | QTI_PLAT_PATH := plat/qti |
| 11 | CHIPSET := ${PLAT} |
| 12 | |
| 13 | # Turn On Separate code & data. |
| 14 | SEPARATE_CODE_AND_RODATA := 1 |
Saurabh Gorecha | b849301 | 2022-04-05 00:11:52 +0530 | [diff] [blame] | 15 | USE_COHERENT_MEM := 0 |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 16 | WARMBOOT_ENABLE_DCACHE_EARLY := 1 |
Saurabh Gorecha | b849301 | 2022-04-05 00:11:52 +0530 | [diff] [blame] | 17 | HW_ASSISTED_COHERENCY := 1 |
| 18 | |
| 19 | #Enable errata configs for cortex_a78 and cortex_a55 |
| 20 | ERRATA_A55_1530923 := 1 |
| 21 | ERRATA_A78_1941498 := 1 |
| 22 | ERRATA_A78_1951500 := 1 |
| 23 | ERRATA_A78_2132060 := 1 |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 24 | |
| 25 | # Disable the PSCI platform compatibility layer |
| 26 | ENABLE_PLAT_COMPAT := 0 |
| 27 | |
| 28 | # Enable PSCI v1.0 extended state ID format |
| 29 | PSCI_EXTENDED_STATE_ID := 1 |
| 30 | ARM_RECOM_STATE_ID_ENC := 1 |
Maulik Shah | 8388dea | 2023-02-14 13:03:24 +0530 | [diff] [blame] | 31 | PSCI_OS_INIT_MODE := 1 |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 32 | |
| 33 | COLD_BOOT_SINGLE_CPU := 1 |
| 34 | PROGRAMMABLE_RESET_ADDRESS := 1 |
| 35 | |
| 36 | RESET_TO_BL31 := 0 |
| 37 | |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 38 | QTI_SDI_BUILD := 0 |
| 39 | $(eval $(call assert_boolean,QTI_SDI_BUILD)) |
| 40 | $(eval $(call add_define,QTI_SDI_BUILD)) |
| 41 | |
| 42 | #disable CTX_INCLUDE_AARCH32_REGS to support sc7280 gold cores |
| 43 | override CTX_INCLUDE_AARCH32_REGS := 0 |
| 44 | WORKAROUND_CVE_2017_5715 := 0 |
| 45 | DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 |
| 46 | # Enable stack protector. |
| 47 | ENABLE_STACK_PROTECTOR := strong |
| 48 | |
| 49 | |
| 50 | QTI_EXTERNAL_INCLUDES := -I${QTI_PLAT_PATH}/${CHIPSET}/inc \ |
| 51 | -I${QTI_PLAT_PATH}/common/inc \ |
| 52 | -I${QTI_PLAT_PATH}/common/inc/$(ARCH) \ |
| 53 | -I${QTI_PLAT_PATH}/qtiseclib/inc \ |
| 54 | -I${QTI_PLAT_PATH}/qtiseclib/inc/${CHIPSET} \ |
| 55 | |
| 56 | QTI_BL31_SOURCES := $(QTI_PLAT_PATH)/common/src/$(ARCH)/qti_helpers.S \ |
| 57 | $(QTI_PLAT_PATH)/common/src/$(ARCH)/qti_kryo6_silver.S \ |
| 58 | $(QTI_PLAT_PATH)/common/src/$(ARCH)/qti_kryo6_gold.S \ |
| 59 | $(QTI_PLAT_PATH)/common/src/$(ARCH)/qti_uart_console.S \ |
Shelley Chen | 68afc06 | 2021-10-01 18:34:07 -0700 | [diff] [blame] | 60 | $(QTI_PLAT_PATH)/common/src/pm_ps_hold.c \ |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 61 | $(QTI_PLAT_PATH)/common/src/qti_stack_protector.c \ |
| 62 | $(QTI_PLAT_PATH)/common/src/qti_common.c \ |
| 63 | $(QTI_PLAT_PATH)/common/src/qti_bl31_setup.c \ |
| 64 | $(QTI_PLAT_PATH)/common/src/qti_gic_v3.c \ |
| 65 | $(QTI_PLAT_PATH)/common/src/qti_interrupt_svc.c \ |
| 66 | $(QTI_PLAT_PATH)/common/src/qti_syscall.c \ |
| 67 | $(QTI_PLAT_PATH)/common/src/qti_topology.c \ |
| 68 | $(QTI_PLAT_PATH)/common/src/qti_pm.c \ |
| 69 | $(QTI_PLAT_PATH)/common/src/qti_rng.c \ |
| 70 | $(QTI_PLAT_PATH)/common/src/spmi_arb.c \ |
| 71 | $(QTI_PLAT_PATH)/qtiseclib/src/qtiseclib_cb_interface.c \ |
| 72 | |
| 73 | |
| 74 | PLAT_INCLUDES := -Iinclude/plat/common/ \ |
| 75 | |
| 76 | PLAT_INCLUDES += ${QTI_EXTERNAL_INCLUDES} |
| 77 | |
| 78 | include lib/xlat_tables_v2/xlat_tables.mk |
| 79 | PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} \ |
| 80 | plat/common/aarch64/crash_console_helpers.S \ |
| 81 | common/desc_image_load.c \ |
| 82 | lib/bl_aux_params/bl_aux_params.c \ |
| 83 | |
| 84 | include lib/coreboot/coreboot.mk |
| 85 | |
| 86 | #PSCI Sources. |
| 87 | PSCI_SOURCES := plat/common/plat_psci_common.c \ |
| 88 | |
| 89 | # GIC-600 configuration |
| 90 | GICV3_SUPPORT_GIC600 := 1 |
| 91 | # Include GICv3 driver files |
| 92 | include drivers/arm/gic/v3/gicv3.mk |
| 93 | |
| 94 | #Timer sources |
| 95 | TIMER_SOURCES := drivers/delay_timer/generic_delay_timer.c \ |
| 96 | drivers/delay_timer/delay_timer.c \ |
| 97 | |
| 98 | #GIC sources. |
| 99 | GIC_SOURCES := plat/common/plat_gicv3.c \ |
| 100 | ${GICV3_SOURCES} \ |
| 101 | |
Saurabh Gorecha | b849301 | 2022-04-05 00:11:52 +0530 | [diff] [blame] | 102 | CPU_SOURCES := lib/cpus/aarch64/cortex_a78.S \ |
| 103 | lib/cpus/aarch64/cortex_a55.S \ |
| 104 | |
| 105 | BL31_SOURCES += ${QTI_BL31_SOURCES} \ |
| 106 | ${PSCI_SOURCES} \ |
| 107 | ${GIC_SOURCES} \ |
| 108 | ${TIMER_SOURCES} \ |
| 109 | ${CPU_SOURCES} \ |
Saurabh Gorecha | 43987c5 | 2021-05-24 17:35:34 +0530 | [diff] [blame] | 110 | |
| 111 | LIB_QTI_PATH := ${QTI_PLAT_PATH}/qtiseclib/lib/${CHIPSET} |
| 112 | |
| 113 | |
| 114 | # Override this on the command line to point to the qtiseclib library which |
| 115 | # will be available in coreboot.org |
| 116 | QTISECLIB_PATH ?= |
| 117 | |
| 118 | ifeq ($(QTISECLIB_PATH),) |
| 119 | # if No lib then use stub implementation for qtiseclib interface |
| 120 | $(warning QTISECLIB_PATH is not provided while building, using stub implementation. \ |
| 121 | Please refer docs/plat/qti.rst for more details \ |
| 122 | THIS FIRMWARE WILL NOT BOOT!) |
| 123 | BL31_SOURCES += plat/qti/qtiseclib/src/qtiseclib_interface_stub.c |
| 124 | else |
| 125 | # use library provided by QTISECLIB_PATH |
| 126 | LDFLAGS += -L $(dir $(QTISECLIB_PATH)) |
| 127 | LDLIBS += -l$(patsubst lib%.a,%,$(notdir $(QTISECLIB_PATH))) |
| 128 | endif |
| 129 | |