blob: 70d1db14081868dae3b52ab8699b6a532f2897ca [file] [log] [blame]
Yann Gautier4ede20a2020-09-18 15:04:14 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
Yann Gautier32409c72023-03-02 11:50:07 +01003 * Copyright (c) 2017-2023, STMicroelectronics - All Rights Reserved
Yann Gautier4ede20a2020-09-18 15:04:14 +02004 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
Yann Gautierc55e2ee2023-10-18 14:17:04 +02009 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +020010 fmc_pins_a: fmc-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +020011 pins1 {
12 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
13 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
14 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
15 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
16 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
17 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
18 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
19 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
20 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
21 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
22 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
23 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
24 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
25 bias-disable;
26 drive-push-pull;
27 slew-rate = <1>;
28 };
29 pins2 {
30 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
31 bias-pull-up;
32 };
33 };
34
Yann Gautierc55e2ee2023-10-18 14:17:04 +020035 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +020036 i2c2_pins_a: i2c2-0 {
Grzegorz Szymaszek6f651352021-04-21 19:16:43 +020037 pins {
38 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
39 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
40 bias-disable;
41 drive-open-drain;
42 slew-rate = <0>;
43 };
44 };
45
Yann Gautierc55e2ee2023-10-18 14:17:04 +020046 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +020047 qspi_clk_pins_a: qspi-clk-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +020048 pins {
49 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
50 bias-disable;
51 drive-push-pull;
52 slew-rate = <3>;
53 };
54 };
55
Yann Gautierc55e2ee2023-10-18 14:17:04 +020056 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +020057 qspi_bk1_pins_a: qspi-bk1-0 {
Yann Gautierc55e2ee2023-10-18 14:17:04 +020058 pins {
Yann Gautier4ede20a2020-09-18 15:04:14 +020059 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
60 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
61 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
62 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
63 bias-disable;
64 drive-push-pull;
65 slew-rate = <1>;
66 };
Yann Gautier4ede20a2020-09-18 15:04:14 +020067 };
68
Yann Gautierc55e2ee2023-10-18 14:17:04 +020069 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +020070 qspi_bk2_pins_a: qspi-bk2-0 {
Yann Gautierc55e2ee2023-10-18 14:17:04 +020071 pins {
Yann Gautier4ede20a2020-09-18 15:04:14 +020072 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
73 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
74 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
75 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
76 bias-disable;
77 drive-push-pull;
78 slew-rate = <1>;
79 };
Yann Gautierc55e2ee2023-10-18 14:17:04 +020080 };
81
82 /omit-if-no-ref/
83 qspi_cs1_pins_a: qspi-cs1-0 {
84 pins {
85 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
86 bias-pull-up;
87 drive-push-pull;
88 slew-rate = <1>;
89 };
90 };
91
92 /omit-if-no-ref/
93 qspi_cs2_pins_a: qspi-cs2-0 {
94 pins {
Yann Gautier4ede20a2020-09-18 15:04:14 +020095 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
96 bias-pull-up;
97 drive-push-pull;
98 slew-rate = <1>;
99 };
100 };
101
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200102 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200103 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200104 pins1 {
105 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
106 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
107 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
108 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
109 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
110 slew-rate = <1>;
111 drive-push-pull;
112 bias-disable;
113 };
114 pins2 {
115 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
116 slew-rate = <2>;
117 drive-push-pull;
118 bias-disable;
119 };
120 };
121
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200122 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200123 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200124 pins1 {
125 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
126 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
127 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
128 slew-rate = <1>;
129 drive-push-pull;
130 bias-pull-up;
131 };
Johann Neuhausera5ef16a2022-07-08 15:22:05 +0200132 pins2 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200133 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
134 bias-pull-up;
135 };
136 };
137
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200138 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200139 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
Johann Neuhauser5ae969b2022-07-13 12:04:21 +0200140 pins1 {
141 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
142 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
143 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
144 slew-rate = <1>;
145 drive-push-pull;
146 bias-pull-up;
147 };
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200148 pins2 {
Johann Neuhauser5ae969b2022-07-13 12:04:21 +0200149 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
150 bias-pull-up;
151 };
152 };
153
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200154 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200155 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200156 pins1 {
157 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
158 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
159 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
160 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
161 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
162 slew-rate = <1>;
163 drive-push-pull;
164 bias-pull-up;
165 };
166 pins2 {
167 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
168 slew-rate = <2>;
169 drive-push-pull;
170 bias-pull-up;
171 };
172 };
173
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200174 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200175 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200176 pins1 {
177 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
178 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
179 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
180 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
181 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
182 slew-rate = <1>;
183 drive-push-pull;
184 bias-disable;
185 };
186 pins2 {
187 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
188 slew-rate = <2>;
189 drive-push-pull;
190 bias-disable;
191 };
192 };
193
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200194 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200195 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200196 pins {
197 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
198 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
199 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
200 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
201 slew-rate = <1>;
202 drive-push-pull;
203 bias-pull-up;
204 };
205 };
206
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200207 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200208 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200209 pins {
210 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
211 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
212 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
213 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
214 slew-rate = <1>;
215 drive-push-pull;
216 bias-disable;
217 };
218 };
219
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200220 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200221 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
Johann Neuhauser5ae969b2022-07-13 12:04:21 +0200222 pins {
223 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
224 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
225 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
226 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
227 slew-rate = <1>;
228 drive-push-pull;
229 bias-pull-up;
230 };
231 };
232
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200233 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200234 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
Grzegorz Szymaszek6f632672021-04-21 19:30:50 +0200235 pins {
236 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
237 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
238 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
239 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
240 };
241 };
242
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200243 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200244 uart4_pins_a: uart4-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200245 pins1 {
246 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
247 bias-disable;
248 drive-push-pull;
249 slew-rate = <0>;
250 };
251 pins2 {
252 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
253 bias-disable;
254 };
255 };
256
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200257 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200258 uart4_pins_b: uart4-1 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200259 pins1 {
260 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
261 bias-disable;
262 drive-push-pull;
263 slew-rate = <0>;
264 };
265 pins2 {
266 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
267 bias-disable;
268 };
269 };
270
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200271 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200272 uart7_pins_a: uart7-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200273 pins1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200274 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
Yann Gautier4ede20a2020-09-18 15:04:14 +0200275 bias-disable;
276 drive-push-pull;
277 slew-rate = <0>;
278 };
279 pins2 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200280 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
281 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
282 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
Yann Gautier4ede20a2020-09-18 15:04:14 +0200283 bias-disable;
284 };
285 };
286
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200287 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200288 uart7_pins_b: uart7-1 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200289 pins1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200290 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
291 bias-disable;
292 drive-push-pull;
293 slew-rate = <0>;
294 };
295 pins2 {
296 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
297 bias-disable;
298 };
299 };
300
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200301 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200302 uart7_pins_c: uart7-2 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200303 pins1 {
304 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
Yann Gautier4ede20a2020-09-18 15:04:14 +0200305 bias-disable;
306 drive-push-pull;
307 slew-rate = <0>;
308 };
309 pins2 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200310 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200311 bias-pull-up;
Yann Gautier4ede20a2020-09-18 15:04:14 +0200312 };
313 };
314
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200315 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200316 uart8_pins_a: uart8-0 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200317 pins1 {
318 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
319 bias-disable;
320 drive-push-pull;
321 slew-rate = <0>;
322 };
323 pins2 {
324 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
325 bias-disable;
326 };
327 };
328
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200329 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200330 usart2_pins_a: usart2-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200331 pins1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200332 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
333 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
334 bias-disable;
335 drive-push-pull;
336 slew-rate = <0>;
337 };
338 pins2 {
339 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
340 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
341 bias-disable;
342 };
343 };
344
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200345 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200346 usart2_pins_b: usart2-1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200347 pins1 {
348 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
349 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
350 bias-disable;
351 drive-push-pull;
352 slew-rate = <0>;
353 };
354 pins2 {
355 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
356 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
357 bias-disable;
358 };
359 };
360
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200361 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200362 usart2_pins_c: usart2-2 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200363 pins1 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200364 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
365 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
366 bias-disable;
367 drive-push-pull;
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200368 slew-rate = <0>;
Yann Gautier4ede20a2020-09-18 15:04:14 +0200369 };
370 pins2 {
371 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
372 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
373 bias-disable;
374 };
375 };
376
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200377 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200378 usart3_pins_a: usart3-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200379 pins1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200380 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
381 bias-disable;
382 drive-push-pull;
383 slew-rate = <0>;
384 };
385 pins2 {
386 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
387 bias-disable;
388 };
389 };
390
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200391 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200392 usart3_pins_b: usart3-1 {
Yann Gautierbb053d52021-10-20 17:22:32 +0200393 pins1 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200394 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
395 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
396 bias-disable;
397 drive-push-pull;
398 slew-rate = <0>;
399 };
400 pins2 {
401 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
402 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
403 bias-disable;
404 };
405 };
406
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200407 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200408 usart3_pins_c: usart3-2 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200409 pins1 {
410 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
411 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
412 bias-disable;
413 drive-push-pull;
414 slew-rate = <0>;
415 };
416 pins2 {
417 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
418 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
419 bias-disable;
420 };
421 };
422
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200423 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200424 usbotg_hs_pins_a: usbotg-hs-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200425 pins {
426 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
427 };
428 };
429
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200430 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200431 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200432 pins {
433 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
434 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
435 };
436 };
437};
438
439&pinctrl_z {
Yann Gautierc55e2ee2023-10-18 14:17:04 +0200440 /omit-if-no-ref/
Yann Gautier5c14e6b2023-04-06 18:14:41 +0200441 i2c4_pins_a: i2c4-0 {
Yann Gautier4ede20a2020-09-18 15:04:14 +0200442 pins {
443 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
444 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
445 bias-disable;
446 drive-open-drain;
447 slew-rate = <0>;
448 };
449 };
450};