blob: b1921cc389520fab99548259191a89c3e3ae53c3 [file] [log] [blame]
Bryan O'Donoghue937bd6f2018-05-24 19:32:52 +01001/*
2 * Copyright (c) Linaro 2018 Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <assert_macros.S>
10#include <platform_def.h>
Bryan O'Donoghue40c70ae2018-07-04 13:16:35 +010011#include <imx_hab.h>
Bryan O'Donoghue937bd6f2018-05-24 19:32:52 +010012
13 .globl platform_mem_init
14 .globl plat_get_my_entrypoint
15 .globl plat_crash_console_init
16 .globl plat_crash_console_putc
Bryan O'Donoghue40c70ae2018-07-04 13:16:35 +010017 .globl plat_panic_handler
Bryan O'Donoghue937bd6f2018-05-24 19:32:52 +010018
19 /* ---------------------------------------------
20 * int plat_mem_init(void)
21 * Function to initialize memory.
22 * The HAB hands off the DDR controller already
23 * setup and ready to use.
24 * Implement the mandatory function as a NOP
25 * ---------------------------------------------
26 */
27func platform_mem_init
28 bx lr
29endfunc platform_mem_init
30
31func plat_get_my_entrypoint
32 mov r0, #0
33 bx lr
34endfunc plat_get_my_entrypoint
35
36func plat_crash_console_init
37 mov_imm r0, PLAT_WARP7_BOOT_UART_BASE
38 mov_imm r1, PLAT_WARP7_BOOT_UART_CLK_IN_HZ
39 mov_imm r2, PLAT_WARP7_CONSOLE_BAUDRATE
40 b imx_crash_uart_init
41endfunc plat_crash_console_init
42
43func plat_crash_console_putc
44 mov_imm r1, PLAT_WARP7_BOOT_UART_BASE
45 b imx_crash_uart_putc
46endfunc plat_crash_console_putc
Bryan O'Donoghue40c70ae2018-07-04 13:16:35 +010047
48func plat_panic_handler
49 mov r3, #HAB_ROM_VECTOR_TABLE_FAILSAFE
50 ldr r3, [r3, #0]
51 blx r3
52endfunc plat_panic_handler