blob: b12ff325f2f0b8ae655f4e8caa5d1f19cbe69a53 [file] [log] [blame]
Bryan O'Donoghue937bd6f2018-05-24 19:32:52 +01001/*
2 * Copyright (c) Linaro 2018 Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <assert_macros.S>
10#include <platform_def.h>
11
12 .globl platform_mem_init
13 .globl plat_get_my_entrypoint
14 .globl plat_crash_console_init
15 .globl plat_crash_console_putc
16
17 /* ---------------------------------------------
18 * int plat_mem_init(void)
19 * Function to initialize memory.
20 * The HAB hands off the DDR controller already
21 * setup and ready to use.
22 * Implement the mandatory function as a NOP
23 * ---------------------------------------------
24 */
25func platform_mem_init
26 bx lr
27endfunc platform_mem_init
28
29func plat_get_my_entrypoint
30 mov r0, #0
31 bx lr
32endfunc plat_get_my_entrypoint
33
34func plat_crash_console_init
35 mov_imm r0, PLAT_WARP7_BOOT_UART_BASE
36 mov_imm r1, PLAT_WARP7_BOOT_UART_CLK_IN_HZ
37 mov_imm r2, PLAT_WARP7_CONSOLE_BAUDRATE
38 b imx_crash_uart_init
39endfunc plat_crash_console_init
40
41func plat_crash_console_putc
42 mov_imm r1, PLAT_WARP7_BOOT_UART_BASE
43 b imx_crash_uart_putc
44endfunc plat_crash_console_putc