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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Soby Mathewa0fedc42016-06-16 14:52:04 +01002 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __PSCI_PRIVATE_H__
32#define __PSCI_PRIVATE_H__
33
Achin Guptaa59caa42013-12-05 14:21:04 +000034#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010035#include <bakery_lock.h>
Soby Mathew8595b872015-01-06 15:36:38 +000036#include <bl_common.h>
Soby Mathew981487a2015-07-13 14:10:57 +010037#include <cpu_data.h>
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010038#include <pmf.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010039#include <psci.h>
Soby Mathew981487a2015-07-13 14:10:57 +010040#include <spinlock.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010041
Soby Mathew523d6332015-01-08 18:02:19 +000042/*
43 * The following helper macros abstract the interface to the Bakery
44 * Lock API.
45 */
Soby Mathew981487a2015-07-13 14:10:57 +010046#define psci_lock_init(non_cpu_pd_node, idx) \
47 ((non_cpu_pd_node)[(idx)].lock_index = (idx))
48#define psci_lock_get(non_cpu_pd_node) \
Andrew Thoelkee466c9f2015-09-10 11:39:36 +010049 bakery_lock_get(&psci_locks[(non_cpu_pd_node)->lock_index])
Soby Mathew981487a2015-07-13 14:10:57 +010050#define psci_lock_release(non_cpu_pd_node) \
Andrew Thoelkee466c9f2015-09-10 11:39:36 +010051 bakery_lock_release(&psci_locks[(non_cpu_pd_node)->lock_index])
Andrew Thoelke56f44702014-06-20 00:36:14 +010052
Soby Mathew6cdddaf2015-01-07 11:10:22 +000053/*
54 * The PSCI capability which are provided by the generic code but does not
55 * depend on the platform or spd capabilities.
56 */
57#define PSCI_GENERIC_CAP \
58 (define_psci_cap(PSCI_VERSION) | \
59 define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
60 define_psci_cap(PSCI_FEATURES))
61
62/*
63 * The PSCI capabilities mask for 64 bit functions.
64 */
65#define PSCI_CAP_64BIT_MASK \
66 (define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) | \
67 define_psci_cap(PSCI_CPU_ON_AARCH64) | \
68 define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
69 define_psci_cap(PSCI_MIG_AARCH64) | \
Soby Mathew96168382014-12-17 14:47:57 +000070 define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) | \
Jeenu Viswambharan7f03e9d92016-08-03 15:54:50 +010071 define_psci_cap(PSCI_NODE_HW_STATE_AARCH64) | \
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010072 define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64) | \
73 define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64) | \
74 define_psci_cap(PSCI_STAT_COUNT_AARCH64))
Soby Mathew6cdddaf2015-01-07 11:10:22 +000075
Soby Mathew981487a2015-07-13 14:10:57 +010076/*
77 * Helper macros to get/set the fields of PSCI per-cpu data.
78 */
79#define psci_set_aff_info_state(aff_state) \
80 set_cpu_data(psci_svc_cpu_data.aff_info_state, aff_state)
81#define psci_get_aff_info_state() \
82 get_cpu_data(psci_svc_cpu_data.aff_info_state)
83#define psci_get_aff_info_state_by_idx(idx) \
84 get_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state)
Soby Mathewca370502016-01-26 11:47:53 +000085#define psci_set_aff_info_state_by_idx(idx, aff_state) \
86 set_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state,\
87 aff_state)
Soby Mathew981487a2015-07-13 14:10:57 +010088#define psci_get_suspend_pwrlvl() \
89 get_cpu_data(psci_svc_cpu_data.target_pwrlvl)
90#define psci_set_suspend_pwrlvl(target_lvl) \
91 set_cpu_data(psci_svc_cpu_data.target_pwrlvl, target_lvl)
92#define psci_set_cpu_local_state(state) \
93 set_cpu_data(psci_svc_cpu_data.local_state, state)
94#define psci_get_cpu_local_state() \
95 get_cpu_data(psci_svc_cpu_data.local_state)
96#define psci_get_cpu_local_state_by_idx(idx) \
97 get_cpu_data_by_index(idx, psci_svc_cpu_data.local_state)
98
99/*
100 * Helper macros for the CPU level spinlocks
101 */
102#define psci_spin_lock_cpu(idx) spin_lock(&psci_cpu_pd_nodes[idx].cpu_lock)
103#define psci_spin_unlock_cpu(idx) spin_unlock(&psci_cpu_pd_nodes[idx].cpu_lock)
104
105/* Helper macro to identify a CPU standby request in PSCI Suspend call */
106#define is_cpu_standby_req(is_power_down_state, retn_lvl) \
107 (((!(is_power_down_state)) && ((retn_lvl) == 0)) ? 1 : 0)
Soby Mathew6cdddaf2015-01-07 11:10:22 +0000108
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100109/* Following are used as ID's to capture time-stamp */
110#define PSCI_STAT_ID_ENTER_LOW_PWR 0
111#define PSCI_STAT_ID_EXIT_LOW_PWR 1
112#define PSCI_STAT_TOTAL_IDS 2
113
114/* Declare PMF service functions for PSCI */
115PMF_DECLARE_CAPTURE_TIMESTAMP(psci_svc)
116PMF_DECLARE_GET_TIMESTAMP(psci_svc)
117
Achin Gupta4f6ad662013-10-25 09:08:21 +0100118/*******************************************************************************
Soby Mathew981487a2015-07-13 14:10:57 +0100119 * The following two data structures implement the power domain tree. The tree
120 * is used to track the state of all the nodes i.e. power domain instances
121 * described by the platform. The tree consists of nodes that describe CPU power
122 * domains i.e. leaf nodes and all other power domains which are parents of a
123 * CPU power domain i.e. non-leaf nodes.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100124 ******************************************************************************/
Soby Mathew981487a2015-07-13 14:10:57 +0100125typedef struct non_cpu_pwr_domain_node {
126 /*
127 * Index of the first CPU power domain node level 0 which has this node
128 * as its parent.
129 */
130 unsigned int cpu_start_idx;
131
132 /*
133 * Number of CPU power domains which are siblings of the domain indexed
134 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
135 * -> cpu_start_idx + ncpus' have this node as their parent.
136 */
137 unsigned int ncpus;
138
139 /*
140 * Index of the parent power domain node.
141 * TODO: Figure out whether to whether using pointer is more efficient.
142 */
143 unsigned int parent_node;
144
145 plat_local_state_t local_state;
146
Achin Gupta75f73672013-12-05 16:33:10 +0000147 unsigned char level;
Andrew Thoelkee466c9f2015-09-10 11:39:36 +0100148
149 /* For indexing the psci_lock array*/
Soby Mathew981487a2015-07-13 14:10:57 +0100150 unsigned char lock_index;
Soby Mathew981487a2015-07-13 14:10:57 +0100151} non_cpu_pd_node_t;
152
153typedef struct cpu_pwr_domain_node {
Soby Mathew011ca182015-07-29 17:05:03 +0100154 u_register_t mpidr;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100155
Soby Mathew981487a2015-07-13 14:10:57 +0100156 /*
157 * Index of the parent power domain node.
158 * TODO: Figure out whether to whether using pointer is more efficient.
159 */
160 unsigned int parent_node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100161
Soby Mathew981487a2015-07-13 14:10:57 +0100162 /*
163 * A CPU power domain does not require state coordination like its
164 * parent power domains. Hence this node does not include a bakery
165 * lock. A spinlock is required by the CPU_ON handler to prevent a race
166 * when multiple CPUs try to turn ON the same target CPU.
167 */
168 spinlock_t cpu_lock;
169} cpu_pd_node_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100170
171/*******************************************************************************
172 * Data prototypes
173 ******************************************************************************/
Soby Mathew981487a2015-07-13 14:10:57 +0100174extern const plat_psci_ops_t *psci_plat_pm_ops;
175extern non_cpu_pd_node_t psci_non_cpu_pd_nodes[PSCI_NUM_NON_CPU_PWR_DOMAINS];
176extern cpu_pd_node_t psci_cpu_pd_nodes[PLATFORM_CORE_COUNT];
Soby Mathew011ca182015-07-29 17:05:03 +0100177extern unsigned int psci_caps;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100178
Andrew Thoelkee466c9f2015-09-10 11:39:36 +0100179/* One bakery lock is required for each non-cpu power domain */
180DECLARE_BAKERY_LOCK(psci_locks[PSCI_NUM_NON_CPU_PWR_DOMAINS]);
181
Achin Gupta4f6ad662013-10-25 09:08:21 +0100182/*******************************************************************************
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000183 * SPD's power management hooks registered with PSCI
Achin Gupta607084e2014-02-09 18:24:19 +0000184 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100185extern const spd_pm_ops_t *psci_spd_pm;
Achin Gupta607084e2014-02-09 18:24:19 +0000186
187/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100188 * Function prototypes
189 ******************************************************************************/
190/* Private exported functions from psci_common.c */
Soby Mathew981487a2015-07-13 14:10:57 +0100191int psci_validate_power_state(unsigned int power_state,
192 psci_power_state_t *state_info);
193void psci_query_sys_suspend_pwrstate(psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100194int psci_validate_mpidr(u_register_t mpidr);
Soby Mathew981487a2015-07-13 14:10:57 +0100195void psci_init_req_local_pwr_states(void);
Achin Gupta9b2bf252016-06-28 16:46:15 +0100196void psci_get_target_local_pwr_states(unsigned int end_pwrlvl,
197 psci_power_state_t *target_state);
Soby Mathewf1f97a12015-07-15 12:13:26 +0100198int psci_validate_entry_point(entry_point_info_t *ep,
Soby Mathew011ca182015-07-29 17:05:03 +0100199 uintptr_t entrypoint, u_register_t context_id);
Soby Mathew981487a2015-07-13 14:10:57 +0100200void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
Soby Mathew011ca182015-07-29 17:05:03 +0100201 unsigned int end_lvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100202 unsigned int node_index[]);
Soby Mathew011ca182015-07-29 17:05:03 +0100203void psci_do_state_coordination(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100204 psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100205void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100206 unsigned int cpu_idx);
Soby Mathew011ca182015-07-29 17:05:03 +0100207void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100208 unsigned int cpu_idx);
209int psci_validate_suspend_req(const psci_power_state_t *state_info,
210 unsigned int is_power_down_state_req);
211unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
212unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100213void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
Soby Mathew981487a2015-07-13 14:10:57 +0100214void psci_print_power_domain_map(void);
Soby Mathew96168382014-12-17 14:47:57 +0000215unsigned int psci_is_last_on_cpu(void);
Soby Mathew011ca182015-07-29 17:05:03 +0100216int psci_spd_migrate_info(u_register_t *mpidr);
Achin Gupta0959db52013-12-02 17:33:04 +0000217
Soby Mathew981487a2015-07-13 14:10:57 +0100218/* Private exported functions from psci_on.c */
Soby Mathewa0fedc42016-06-16 14:52:04 +0100219int psci_cpu_on_start(u_register_t target_cpu,
Sandrine Bailleux7497bff2016-04-25 09:28:43 +0100220 entry_point_info_t *ep);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100221
Soby Mathew981487a2015-07-13 14:10:57 +0100222void psci_cpu_on_finish(unsigned int cpu_idx,
223 psci_power_state_t *state_info);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100224
Sandrine Bailleuxf4119ec2015-12-17 13:58:58 +0000225/* Private exported functions from psci_off.c */
Soby Mathew011ca182015-07-29 17:05:03 +0100226int psci_do_cpu_off(unsigned int end_pwrlvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100227
Sandrine Bailleuxf4119ec2015-12-17 13:58:58 +0000228/* Private exported functions from psci_suspend.c */
Soby Mathew981487a2015-07-13 14:10:57 +0100229void psci_cpu_suspend_start(entry_point_info_t *ep,
Soby Mathew011ca182015-07-29 17:05:03 +0100230 unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100231 psci_power_state_t *state_info,
232 unsigned int is_power_down_state_req);
Soby Mathew8595b872015-01-06 15:36:38 +0000233
Soby Mathew981487a2015-07-13 14:10:57 +0100234void psci_cpu_suspend_finish(unsigned int cpu_idx,
235 psci_power_state_t *state_info);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000236
Achin Guptae1aa5162014-06-26 09:58:52 +0100237/* Private exported functions from psci_helpers.S */
Soby Mathew011ca182015-07-29 17:05:03 +0100238void psci_do_pwrdown_cache_maintenance(unsigned int pwr_level);
Achin Guptae1aa5162014-06-26 09:58:52 +0100239void psci_do_pwrup_cache_maintenance(void);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100240
Juan Castillo4dc4a472014-08-12 11:17:06 +0100241/* Private exported functions from psci_system_off.c */
242void __dead2 psci_system_off(void);
243void __dead2 psci_system_reset(void);
244
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100245/* Private exported functions from psci_stat.c */
246void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
247 const psci_power_state_t *state_info);
248void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
249 const psci_power_state_t *state_info,
250 unsigned int flags);
251u_register_t psci_stat_residency(u_register_t target_cpu,
252 unsigned int power_state);
253u_register_t psci_stat_count(u_register_t target_cpu,
254 unsigned int power_state);
255
Achin Gupta4f6ad662013-10-25 09:08:21 +0100256#endif /* __PSCI_PRIVATE_H__ */