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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Soby Mathew981487a2015-07-13 14:10:57 +01002 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __PSCI_PRIVATE_H__
32#define __PSCI_PRIVATE_H__
33
Achin Guptaa59caa42013-12-05 14:21:04 +000034#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010035#include <bakery_lock.h>
Soby Mathew8595b872015-01-06 15:36:38 +000036#include <bl_common.h>
Soby Mathew981487a2015-07-13 14:10:57 +010037#include <cpu_data.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010038#include <psci.h>
Soby Mathew981487a2015-07-13 14:10:57 +010039#include <spinlock.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010040
Soby Mathew523d6332015-01-08 18:02:19 +000041/*
42 * The following helper macros abstract the interface to the Bakery
43 * Lock API.
44 */
Soby Mathew981487a2015-07-13 14:10:57 +010045#define psci_lock_init(non_cpu_pd_node, idx) \
46 ((non_cpu_pd_node)[(idx)].lock_index = (idx))
47#define psci_lock_get(non_cpu_pd_node) \
Andrew Thoelkee466c9f2015-09-10 11:39:36 +010048 bakery_lock_get(&psci_locks[(non_cpu_pd_node)->lock_index])
Soby Mathew981487a2015-07-13 14:10:57 +010049#define psci_lock_release(non_cpu_pd_node) \
Andrew Thoelkee466c9f2015-09-10 11:39:36 +010050 bakery_lock_release(&psci_locks[(non_cpu_pd_node)->lock_index])
Andrew Thoelke56f44702014-06-20 00:36:14 +010051
Soby Mathew6cdddaf2015-01-07 11:10:22 +000052/*
53 * The PSCI capability which are provided by the generic code but does not
54 * depend on the platform or spd capabilities.
55 */
56#define PSCI_GENERIC_CAP \
57 (define_psci_cap(PSCI_VERSION) | \
58 define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
59 define_psci_cap(PSCI_FEATURES))
60
61/*
62 * The PSCI capabilities mask for 64 bit functions.
63 */
64#define PSCI_CAP_64BIT_MASK \
65 (define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) | \
66 define_psci_cap(PSCI_CPU_ON_AARCH64) | \
67 define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
68 define_psci_cap(PSCI_MIG_AARCH64) | \
Soby Mathew96168382014-12-17 14:47:57 +000069 define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) | \
70 define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64))
Soby Mathew6cdddaf2015-01-07 11:10:22 +000071
Soby Mathew981487a2015-07-13 14:10:57 +010072/*
73 * Helper macros to get/set the fields of PSCI per-cpu data.
74 */
75#define psci_set_aff_info_state(aff_state) \
76 set_cpu_data(psci_svc_cpu_data.aff_info_state, aff_state)
77#define psci_get_aff_info_state() \
78 get_cpu_data(psci_svc_cpu_data.aff_info_state)
79#define psci_get_aff_info_state_by_idx(idx) \
80 get_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state)
81#define psci_get_suspend_pwrlvl() \
82 get_cpu_data(psci_svc_cpu_data.target_pwrlvl)
83#define psci_set_suspend_pwrlvl(target_lvl) \
84 set_cpu_data(psci_svc_cpu_data.target_pwrlvl, target_lvl)
85#define psci_set_cpu_local_state(state) \
86 set_cpu_data(psci_svc_cpu_data.local_state, state)
87#define psci_get_cpu_local_state() \
88 get_cpu_data(psci_svc_cpu_data.local_state)
89#define psci_get_cpu_local_state_by_idx(idx) \
90 get_cpu_data_by_index(idx, psci_svc_cpu_data.local_state)
91
92/*
93 * Helper macros for the CPU level spinlocks
94 */
95#define psci_spin_lock_cpu(idx) spin_lock(&psci_cpu_pd_nodes[idx].cpu_lock)
96#define psci_spin_unlock_cpu(idx) spin_unlock(&psci_cpu_pd_nodes[idx].cpu_lock)
97
98/* Helper macro to identify a CPU standby request in PSCI Suspend call */
99#define is_cpu_standby_req(is_power_down_state, retn_lvl) \
100 (((!(is_power_down_state)) && ((retn_lvl) == 0)) ? 1 : 0)
Soby Mathew6cdddaf2015-01-07 11:10:22 +0000101
Achin Gupta4f6ad662013-10-25 09:08:21 +0100102/*******************************************************************************
Soby Mathew981487a2015-07-13 14:10:57 +0100103 * The following two data structures implement the power domain tree. The tree
104 * is used to track the state of all the nodes i.e. power domain instances
105 * described by the platform. The tree consists of nodes that describe CPU power
106 * domains i.e. leaf nodes and all other power domains which are parents of a
107 * CPU power domain i.e. non-leaf nodes.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100108 ******************************************************************************/
Soby Mathew981487a2015-07-13 14:10:57 +0100109typedef struct non_cpu_pwr_domain_node {
110 /*
111 * Index of the first CPU power domain node level 0 which has this node
112 * as its parent.
113 */
114 unsigned int cpu_start_idx;
115
116 /*
117 * Number of CPU power domains which are siblings of the domain indexed
118 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
119 * -> cpu_start_idx + ncpus' have this node as their parent.
120 */
121 unsigned int ncpus;
122
123 /*
124 * Index of the parent power domain node.
125 * TODO: Figure out whether to whether using pointer is more efficient.
126 */
127 unsigned int parent_node;
128
129 plat_local_state_t local_state;
130
Achin Gupta75f73672013-12-05 16:33:10 +0000131 unsigned char level;
Andrew Thoelkee466c9f2015-09-10 11:39:36 +0100132
133 /* For indexing the psci_lock array*/
Soby Mathew981487a2015-07-13 14:10:57 +0100134 unsigned char lock_index;
Soby Mathew981487a2015-07-13 14:10:57 +0100135} non_cpu_pd_node_t;
136
137typedef struct cpu_pwr_domain_node {
Soby Mathew011ca182015-07-29 17:05:03 +0100138 u_register_t mpidr;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100139
Soby Mathew981487a2015-07-13 14:10:57 +0100140 /*
141 * Index of the parent power domain node.
142 * TODO: Figure out whether to whether using pointer is more efficient.
143 */
144 unsigned int parent_node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100145
Soby Mathew981487a2015-07-13 14:10:57 +0100146 /*
147 * A CPU power domain does not require state coordination like its
148 * parent power domains. Hence this node does not include a bakery
149 * lock. A spinlock is required by the CPU_ON handler to prevent a race
150 * when multiple CPUs try to turn ON the same target CPU.
151 */
152 spinlock_t cpu_lock;
153} cpu_pd_node_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100154
155/*******************************************************************************
156 * Data prototypes
157 ******************************************************************************/
Soby Mathew981487a2015-07-13 14:10:57 +0100158extern const plat_psci_ops_t *psci_plat_pm_ops;
159extern non_cpu_pd_node_t psci_non_cpu_pd_nodes[PSCI_NUM_NON_CPU_PWR_DOMAINS];
160extern cpu_pd_node_t psci_cpu_pd_nodes[PLATFORM_CORE_COUNT];
Soby Mathew011ca182015-07-29 17:05:03 +0100161extern unsigned int psci_caps;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100162
Andrew Thoelkee466c9f2015-09-10 11:39:36 +0100163/* One bakery lock is required for each non-cpu power domain */
164DECLARE_BAKERY_LOCK(psci_locks[PSCI_NUM_NON_CPU_PWR_DOMAINS]);
165
Achin Gupta4f6ad662013-10-25 09:08:21 +0100166/*******************************************************************************
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000167 * SPD's power management hooks registered with PSCI
Achin Gupta607084e2014-02-09 18:24:19 +0000168 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100169extern const spd_pm_ops_t *psci_spd_pm;
Achin Gupta607084e2014-02-09 18:24:19 +0000170
171/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100172 * Function prototypes
173 ******************************************************************************/
174/* Private exported functions from psci_common.c */
Soby Mathew981487a2015-07-13 14:10:57 +0100175int psci_validate_power_state(unsigned int power_state,
176 psci_power_state_t *state_info);
177void psci_query_sys_suspend_pwrstate(psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100178int psci_validate_mpidr(u_register_t mpidr);
Soby Mathew981487a2015-07-13 14:10:57 +0100179void psci_init_req_local_pwr_states(void);
180void psci_power_up_finish(void);
Soby Mathewf1f97a12015-07-15 12:13:26 +0100181int psci_validate_entry_point(entry_point_info_t *ep,
Soby Mathew011ca182015-07-29 17:05:03 +0100182 uintptr_t entrypoint, u_register_t context_id);
Soby Mathew981487a2015-07-13 14:10:57 +0100183void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
Soby Mathew011ca182015-07-29 17:05:03 +0100184 unsigned int end_lvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100185 unsigned int node_index[]);
Soby Mathew011ca182015-07-29 17:05:03 +0100186void psci_do_state_coordination(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100187 psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100188void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100189 unsigned int cpu_idx);
Soby Mathew011ca182015-07-29 17:05:03 +0100190void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100191 unsigned int cpu_idx);
192int psci_validate_suspend_req(const psci_power_state_t *state_info,
193 unsigned int is_power_down_state_req);
194unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
195unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100196void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
Soby Mathew981487a2015-07-13 14:10:57 +0100197void psci_print_power_domain_map(void);
Soby Mathew96168382014-12-17 14:47:57 +0000198unsigned int psci_is_last_on_cpu(void);
Soby Mathew011ca182015-07-29 17:05:03 +0100199int psci_spd_migrate_info(u_register_t *mpidr);
Achin Gupta0959db52013-12-02 17:33:04 +0000200
Soby Mathew981487a2015-07-13 14:10:57 +0100201/* Private exported functions from psci_on.c */
202int psci_cpu_on_start(unsigned long target_cpu,
203 entry_point_info_t *ep,
Soby Mathew011ca182015-07-29 17:05:03 +0100204 unsigned int end_pwrlvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100205
Soby Mathew981487a2015-07-13 14:10:57 +0100206void psci_cpu_on_finish(unsigned int cpu_idx,
207 psci_power_state_t *state_info);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100208
Soby Mathew981487a2015-07-13 14:10:57 +0100209/* Private exported functions from psci_cpu_off.c */
Soby Mathew011ca182015-07-29 17:05:03 +0100210int psci_do_cpu_off(unsigned int end_pwrlvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100211
Soby Mathew981487a2015-07-13 14:10:57 +0100212/* Private exported functions from psci_pwrlvl_suspend.c */
213void psci_cpu_suspend_start(entry_point_info_t *ep,
Soby Mathew011ca182015-07-29 17:05:03 +0100214 unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100215 psci_power_state_t *state_info,
216 unsigned int is_power_down_state_req);
Soby Mathew8595b872015-01-06 15:36:38 +0000217
Soby Mathew981487a2015-07-13 14:10:57 +0100218void psci_cpu_suspend_finish(unsigned int cpu_idx,
219 psci_power_state_t *state_info);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000220
Achin Guptae1aa5162014-06-26 09:58:52 +0100221/* Private exported functions from psci_helpers.S */
Soby Mathew011ca182015-07-29 17:05:03 +0100222void psci_do_pwrdown_cache_maintenance(unsigned int pwr_level);
Achin Guptae1aa5162014-06-26 09:58:52 +0100223void psci_do_pwrup_cache_maintenance(void);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100224
Juan Castillo4dc4a472014-08-12 11:17:06 +0100225/* Private exported functions from psci_system_off.c */
226void __dead2 psci_system_off(void);
227void __dead2 psci_system_reset(void);
228
Achin Gupta4f6ad662013-10-25 09:08:21 +0100229#endif /* __PSCI_PRIVATE_H__ */