Michal Simek | 2a47faa | 2023-04-14 08:43:51 +0200 | [diff] [blame] | 1 | # Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. |
Maheedhar Bollapalli | ae8e013 | 2024-07-24 09:54:15 +0530 | [diff] [blame] | 2 | # Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | |
| 6 | override PROGRAMMABLE_RESET_ADDRESS := 1 |
| 7 | PSCI_EXTENDED_STATE_ID := 1 |
| 8 | A53_DISABLE_NON_TEMPORAL_HINT := 0 |
| 9 | SEPARATE_CODE_AND_RODATA := 1 |
| 10 | override RESET_TO_BL31 := 1 |
| 11 | PL011_GENERIC_UART := 1 |
Venkatesh Yadav Abbarapu | 78bcd12 | 2021-02-19 01:46:21 -0700 | [diff] [blame] | 12 | IPI_CRC_CHECK := 0 |
Venkatesh Yadav Abbarapu | 82252a4 | 2021-07-20 22:27:32 -0600 | [diff] [blame] | 13 | HARDEN_SLS_ALL := 0 |
Jay Buddhabhatti | 1dfe497 | 2023-04-25 04:34:51 -0700 | [diff] [blame] | 14 | CPU_PWRDWN_SGI ?= 6 |
| 15 | $(eval $(call add_define_val,CPU_PWR_DOWN_REQ_INTR,ARM_IRQ_SEC_SGI_${CPU_PWRDWN_SGI})) |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 16 | |
Michal Simek | 1cda4b0 | 2022-10-07 08:15:19 +0200 | [diff] [blame] | 17 | # A72 Erratum for SoC |
| 18 | ERRATA_A72_859971 := 1 |
| 19 | ERRATA_A72_1319367 := 1 |
| 20 | |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 21 | ifdef VERSAL_ATF_MEM_BASE |
| 22 | $(eval $(call add_define,VERSAL_ATF_MEM_BASE)) |
| 23 | |
| 24 | ifndef VERSAL_ATF_MEM_SIZE |
Michal Simek | a7178ca | 2024-08-02 13:19:23 +0200 | [diff] [blame] | 25 | $(error "VERSAL_ATF_MEM_BASE defined without VERSAL_ATF_MEM_SIZE") |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 26 | endif |
| 27 | $(eval $(call add_define,VERSAL_ATF_MEM_SIZE)) |
| 28 | |
| 29 | ifdef VERSAL_ATF_MEM_PROGBITS_SIZE |
| 30 | $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE)) |
| 31 | endif |
| 32 | endif |
| 33 | |
| 34 | ifdef VERSAL_BL32_MEM_BASE |
| 35 | $(eval $(call add_define,VERSAL_BL32_MEM_BASE)) |
| 36 | |
| 37 | ifndef VERSAL_BL32_MEM_SIZE |
Michal Simek | a7178ca | 2024-08-02 13:19:23 +0200 | [diff] [blame] | 38 | $(error "VERSAL_BL32_MEM_BASE defined without VERSAL_BL32_MEM_SIZE") |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 39 | endif |
| 40 | $(eval $(call add_define,VERSAL_BL32_MEM_SIZE)) |
| 41 | endif |
| 42 | |
Venkatesh Yadav Abbarapu | 78bcd12 | 2021-02-19 01:46:21 -0700 | [diff] [blame] | 43 | ifdef IPI_CRC_CHECK |
| 44 | $(eval $(call add_define,IPI_CRC_CHECK)) |
| 45 | endif |
| 46 | |
Maheedhar Bollapalli | ae8e013 | 2024-07-24 09:54:15 +0530 | [diff] [blame] | 47 | ifdef VERSAL_PLATFORM |
| 48 | $(warning "VERSAL_PLATFORM has been deprecated") |
| 49 | endif |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 50 | |
Amit Nagal | 3a7d304 | 2023-07-10 10:32:15 +0530 | [diff] [blame] | 51 | ifdef XILINX_OF_BOARD_DTB_ADDR |
| 52 | $(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR)) |
| 53 | endif |
| 54 | |
Amit Nagal | c1248e8 | 2023-09-04 21:53:59 -1200 | [diff] [blame] | 55 | PLAT_XLAT_TABLES_DYNAMIC := 0 |
| 56 | ifeq (${PLAT_XLAT_TABLES_DYNAMIC},1) |
| 57 | $(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC)) |
| 58 | endif |
| 59 | |
Amit Nagal | 5f39807 | 2023-10-30 12:08:34 +0530 | [diff] [blame] | 60 | # enable assert() for release/debug builds |
| 61 | ENABLE_ASSERTIONS := 1 |
| 62 | |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 63 | PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ |
| 64 | -Iplat/xilinx/common/include/ \ |
Wendy Liang | a4494de | 2019-01-21 13:45:49 +0530 | [diff] [blame] | 65 | -Iplat/xilinx/common/ipi_mailbox_service/ \ |
Tejas Patel | 354fe57 | 2018-12-14 00:55:37 -0800 | [diff] [blame] | 66 | -Iplat/xilinx/versal/include/ \ |
| 67 | -Iplat/xilinx/versal/pm_service/ |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 68 | |
Amit Nagal | 3a7d304 | 2023-07-10 10:32:15 +0530 | [diff] [blame] | 69 | include lib/libfdt/libfdt.mk |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 70 | # Include GICv3 driver files |
| 71 | include drivers/arm/gic/v3/gicv3.mk |
Michal Simek | 058251a | 2023-04-13 13:19:11 +0200 | [diff] [blame] | 72 | include lib/xlat_tables_v2/xlat_tables.mk |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 73 | |
Michal Simek | 058251a | 2023-04-13 13:19:11 +0200 | [diff] [blame] | 74 | PLAT_BL_COMMON_SOURCES := drivers/arm/dcc/dcc_console.c \ |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 75 | drivers/delay_timer/delay_timer.c \ |
| 76 | drivers/delay_timer/generic_delay_timer.c \ |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 77 | ${GICV3_SOURCES} \ |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 78 | drivers/arm/pl011/aarch64/pl011_console.S \ |
Ambroise Vincent | 962109f | 2019-03-27 13:48:15 +0000 | [diff] [blame] | 79 | plat/common/aarch64/crash_console_helpers.S \ |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 80 | plat/arm/common/arm_cci.c \ |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 81 | plat/arm/common/arm_common.c \ |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 82 | plat/common/plat_gicv3.c \ |
| 83 | plat/xilinx/versal/aarch64/versal_helpers.S \ |
Michal Simek | 058251a | 2023-04-13 13:19:11 +0200 | [diff] [blame] | 84 | plat/xilinx/versal/aarch64/versal_common.c \ |
| 85 | ${XLAT_TABLES_LIB_SRCS} |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 86 | |
Venkatesh Yadav Abbarapu | 17a12ce | 2020-11-27 08:42:14 -0700 | [diff] [blame] | 87 | VERSAL_CONSOLE ?= pl011 |
Prasad Kummari | 3d18a93 | 2024-03-19 22:42:32 +0530 | [diff] [blame^] | 88 | ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb)) |
Venkatesh Yadav Abbarapu | 17a12ce | 2020-11-27 08:42:14 -0700 | [diff] [blame] | 89 | else |
| 90 | $(error "Please define VERSAL_CONSOLE") |
| 91 | endif |
| 92 | |
| 93 | $(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE})) |
| 94 | |
Prasad Kummari | e0abe5f | 2024-03-19 22:37:12 +0530 | [diff] [blame] | 95 | # Runtime console in default console in DEBUG build |
| 96 | ifeq ($(DEBUG), 1) |
| 97 | CONSOLE_RUNTIME ?= pl011 |
| 98 | endif |
| 99 | |
| 100 | # Runtime console |
| 101 | ifdef CONSOLE_RUNTIME |
| 102 | ifeq (${CONSOLE_RUNTIME}, $(filter ${CONSOLE_RUNTIME},pl011 pl011_0 pl011_1 dcc dtb)) |
| 103 | $(eval $(call add_define_val,CONSOLE_RUNTIME,RT_CONSOLE_ID_${CONSOLE_RUNTIME})) |
| 104 | else |
| 105 | $(error "Please define CONSOLE_RUNTIME") |
| 106 | endif |
| 107 | endif |
| 108 | |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 109 | BL31_SOURCES += drivers/arm/cci/cci.c \ |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 110 | lib/cpus/aarch64/cortex_a72.S \ |
Prasad Kummari | 4d068a4 | 2023-09-19 22:16:12 +0530 | [diff] [blame] | 111 | common/fdt_wrappers.c \ |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 112 | plat/common/plat_psci_common.c \ |
Tejas Patel | 354fe57 | 2018-12-14 00:55:37 -0800 | [diff] [blame] | 113 | plat/xilinx/common/ipi.c \ |
Amit Nagal | 3a7d304 | 2023-07-10 10:32:15 +0530 | [diff] [blame] | 114 | plat/xilinx/common/plat_fdt.c \ |
Prasad Kummari | 4d068a4 | 2023-09-19 22:16:12 +0530 | [diff] [blame] | 115 | plat/xilinx/common/plat_console.c \ |
Prasad Kummari | 2038bd6 | 2023-12-14 10:52:24 +0530 | [diff] [blame] | 116 | plat/xilinx/common/plat_clkfunc.c \ |
Venkatesh Yadav Abbarapu | 9156ffd | 2020-01-22 21:23:20 -0700 | [diff] [blame] | 117 | plat/xilinx/common/plat_startup.c \ |
Wendy Liang | a4494de | 2019-01-21 13:45:49 +0530 | [diff] [blame] | 118 | plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ |
Tejas Patel | 354fe57 | 2018-12-14 00:55:37 -0800 | [diff] [blame] | 119 | plat/xilinx/common/pm_service/pm_ipi.c \ |
Jay Buddhabhatti | 26e138a | 2022-12-21 23:03:35 -0800 | [diff] [blame] | 120 | plat/xilinx/common/pm_service/pm_api_sys.c \ |
| 121 | plat/xilinx/common/pm_service/pm_svc_main.c \ |
Akshay Belsare | 589ccce | 2023-05-08 19:00:53 +0530 | [diff] [blame] | 122 | plat/xilinx/common/versal.c \ |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 123 | plat/xilinx/versal/bl31_versal_setup.c \ |
| 124 | plat/xilinx/versal/plat_psci.c \ |
| 125 | plat/xilinx/versal/plat_versal.c \ |
| 126 | plat/xilinx/versal/plat_topology.c \ |
| 127 | plat/xilinx/versal/sip_svc_setup.c \ |
Tejas Patel | 354fe57 | 2018-12-14 00:55:37 -0800 | [diff] [blame] | 128 | plat/xilinx/versal/versal_gicv3.c \ |
| 129 | plat/xilinx/versal/versal_ipi.c \ |
Amit Nagal | 3a7d304 | 2023-07-10 10:32:15 +0530 | [diff] [blame] | 130 | plat/xilinx/versal/pm_service/pm_client.c \ |
| 131 | common/fdt_fixup.c \ |
| 132 | ${LIBFDT_SRCS} |
Venkatesh Yadav Abbarapu | 82252a4 | 2021-07-20 22:27:32 -0600 | [diff] [blame] | 133 | |
| 134 | ifeq ($(HARDEN_SLS_ALL), 1) |
| 135 | TF_CFLAGS_aarch64 += -mharden-sls=all |
| 136 | endif |
Prasad Kummari | 4acc8d0 | 2023-12-19 11:36:03 +0530 | [diff] [blame] | 137 | |
| 138 | ifeq (${ERRATA_ABI_SUPPORT}, 1) |
| 139 | # enable the cpu macros for errata abi interface |
| 140 | CORTEX_A72_H_INC := 1 |
| 141 | $(eval $(call add_define, CORTEX_A72_H_INC)) |
| 142 | endif |