blob: 2135338daf55a2508af947a4e776fc273963bdbb [file] [log] [blame]
Michal Simek2a47faa2023-04-14 08:43:51 +02001# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
Maheedhar Bollapalliae8e0132024-07-24 09:54:15 +05302# Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05303#
4# SPDX-License-Identifier: BSD-3-Clause
5
6override PROGRAMMABLE_RESET_ADDRESS := 1
7PSCI_EXTENDED_STATE_ID := 1
8A53_DISABLE_NON_TEMPORAL_HINT := 0
9SEPARATE_CODE_AND_RODATA := 1
10override RESET_TO_BL31 := 1
11PL011_GENERIC_UART := 1
Venkatesh Yadav Abbarapu78bcd122021-02-19 01:46:21 -070012IPI_CRC_CHECK := 0
Venkatesh Yadav Abbarapu82252a42021-07-20 22:27:32 -060013HARDEN_SLS_ALL := 0
Jay Buddhabhatti1dfe4972023-04-25 04:34:51 -070014CPU_PWRDWN_SGI ?= 6
15$(eval $(call add_define_val,CPU_PWR_DOWN_REQ_INTR,ARM_IRQ_SEC_SGI_${CPU_PWRDWN_SGI}))
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053016
Michal Simek1cda4b02022-10-07 08:15:19 +020017# A72 Erratum for SoC
18ERRATA_A72_859971 := 1
19ERRATA_A72_1319367 := 1
20
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053021ifdef VERSAL_ATF_MEM_BASE
22 $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
23
24 ifndef VERSAL_ATF_MEM_SIZE
Michal Simeka7178ca2024-08-02 13:19:23 +020025 $(error "VERSAL_ATF_MEM_BASE defined without VERSAL_ATF_MEM_SIZE")
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053026 endif
27 $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
28
29 ifdef VERSAL_ATF_MEM_PROGBITS_SIZE
30 $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
31 endif
32endif
33
34ifdef VERSAL_BL32_MEM_BASE
35 $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
36
37 ifndef VERSAL_BL32_MEM_SIZE
Michal Simeka7178ca2024-08-02 13:19:23 +020038 $(error "VERSAL_BL32_MEM_BASE defined without VERSAL_BL32_MEM_SIZE")
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053039 endif
40 $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
41endif
42
Venkatesh Yadav Abbarapu78bcd122021-02-19 01:46:21 -070043ifdef IPI_CRC_CHECK
44 $(eval $(call add_define,IPI_CRC_CHECK))
45endif
46
Maheedhar Bollapalliae8e0132024-07-24 09:54:15 +053047ifdef VERSAL_PLATFORM
48 $(warning "VERSAL_PLATFORM has been deprecated")
49endif
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053050
Amit Nagal3a7d3042023-07-10 10:32:15 +053051ifdef XILINX_OF_BOARD_DTB_ADDR
52$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
53endif
54
Amit Nagalc1248e82023-09-04 21:53:59 -120055PLAT_XLAT_TABLES_DYNAMIC := 0
56ifeq (${PLAT_XLAT_TABLES_DYNAMIC},1)
57$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
58endif
59
Amit Nagal5f398072023-10-30 12:08:34 +053060# enable assert() for release/debug builds
61ENABLE_ASSERTIONS := 1
62
Tejas Patel54d13192019-02-27 18:44:55 +053063PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
64 -Iplat/xilinx/common/include/ \
Wendy Lianga4494de2019-01-21 13:45:49 +053065 -Iplat/xilinx/common/ipi_mailbox_service/ \
Tejas Patel354fe572018-12-14 00:55:37 -080066 -Iplat/xilinx/versal/include/ \
67 -Iplat/xilinx/versal/pm_service/
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053068
Amit Nagal3a7d3042023-07-10 10:32:15 +053069include lib/libfdt/libfdt.mk
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000070# Include GICv3 driver files
71include drivers/arm/gic/v3/gicv3.mk
Michal Simek058251a2023-04-13 13:19:11 +020072include lib/xlat_tables_v2/xlat_tables.mk
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000073
Michal Simek058251a2023-04-13 13:19:11 +020074PLAT_BL_COMMON_SOURCES := drivers/arm/dcc/dcc_console.c \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053075 drivers/delay_timer/delay_timer.c \
76 drivers/delay_timer/generic_delay_timer.c \
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000077 ${GICV3_SOURCES} \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053078 drivers/arm/pl011/aarch64/pl011_console.S \
Ambroise Vincent962109f2019-03-27 13:48:15 +000079 plat/common/aarch64/crash_console_helpers.S \
Tejas Patel54d13192019-02-27 18:44:55 +053080 plat/arm/common/arm_cci.c \
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -070081 plat/arm/common/arm_common.c \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053082 plat/common/plat_gicv3.c \
83 plat/xilinx/versal/aarch64/versal_helpers.S \
Michal Simek058251a2023-04-13 13:19:11 +020084 plat/xilinx/versal/aarch64/versal_common.c \
85 ${XLAT_TABLES_LIB_SRCS}
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053086
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070087VERSAL_CONSOLE ?= pl011
Prasad Kummari3d18a932024-03-19 22:42:32 +053088ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb))
Venkatesh Yadav Abbarapu17a12ce2020-11-27 08:42:14 -070089else
90 $(error "Please define VERSAL_CONSOLE")
91endif
92
93$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
94
Prasad Kummarie0abe5f2024-03-19 22:37:12 +053095# Runtime console in default console in DEBUG build
96ifeq ($(DEBUG), 1)
97CONSOLE_RUNTIME ?= pl011
98endif
99
100# Runtime console
101ifdef CONSOLE_RUNTIME
102ifeq (${CONSOLE_RUNTIME}, $(filter ${CONSOLE_RUNTIME},pl011 pl011_0 pl011_1 dcc dtb))
103$(eval $(call add_define_val,CONSOLE_RUNTIME,RT_CONSOLE_ID_${CONSOLE_RUNTIME}))
104else
105$(error "Please define CONSOLE_RUNTIME")
106endif
107endif
108
Tejas Patel54d13192019-02-27 18:44:55 +0530109BL31_SOURCES += drivers/arm/cci/cci.c \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530110 lib/cpus/aarch64/cortex_a72.S \
Prasad Kummari4d068a42023-09-19 22:16:12 +0530111 common/fdt_wrappers.c \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530112 plat/common/plat_psci_common.c \
Tejas Patel354fe572018-12-14 00:55:37 -0800113 plat/xilinx/common/ipi.c \
Amit Nagal3a7d3042023-07-10 10:32:15 +0530114 plat/xilinx/common/plat_fdt.c \
Prasad Kummari4d068a42023-09-19 22:16:12 +0530115 plat/xilinx/common/plat_console.c \
Prasad Kummari2038bd62023-12-14 10:52:24 +0530116 plat/xilinx/common/plat_clkfunc.c \
Venkatesh Yadav Abbarapu9156ffd2020-01-22 21:23:20 -0700117 plat/xilinx/common/plat_startup.c \
Wendy Lianga4494de2019-01-21 13:45:49 +0530118 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
Tejas Patel354fe572018-12-14 00:55:37 -0800119 plat/xilinx/common/pm_service/pm_ipi.c \
Jay Buddhabhatti26e138a2022-12-21 23:03:35 -0800120 plat/xilinx/common/pm_service/pm_api_sys.c \
121 plat/xilinx/common/pm_service/pm_svc_main.c \
Akshay Belsare589ccce2023-05-08 19:00:53 +0530122 plat/xilinx/common/versal.c \
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530123 plat/xilinx/versal/bl31_versal_setup.c \
124 plat/xilinx/versal/plat_psci.c \
125 plat/xilinx/versal/plat_versal.c \
126 plat/xilinx/versal/plat_topology.c \
127 plat/xilinx/versal/sip_svc_setup.c \
Tejas Patel354fe572018-12-14 00:55:37 -0800128 plat/xilinx/versal/versal_gicv3.c \
129 plat/xilinx/versal/versal_ipi.c \
Amit Nagal3a7d3042023-07-10 10:32:15 +0530130 plat/xilinx/versal/pm_service/pm_client.c \
131 common/fdt_fixup.c \
132 ${LIBFDT_SRCS}
Venkatesh Yadav Abbarapu82252a42021-07-20 22:27:32 -0600133
134ifeq ($(HARDEN_SLS_ALL), 1)
135TF_CFLAGS_aarch64 += -mharden-sls=all
136endif
Prasad Kummari4acc8d02023-12-19 11:36:03 +0530137
138ifeq (${ERRATA_ABI_SUPPORT}, 1)
139# enable the cpu macros for errata abi interface
140CORTEX_A72_H_INC := 1
141$(eval $(call add_define, CORTEX_A72_H_INC))
142endif