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Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]1Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10 :sorted:
11
12 AArch32
13 32-bit execution state of the ARMv8 ISA
14
15 AArch64
16 64-bit execution state of the ARMv8 ISA
17
Chris Kaycda89212021-08-17 16:24:57 +0100[diff] [blame]18 AMU
19 Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
20 that exposes CPU core runtime metrics as a set of counter registers.
21
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]22 API
23 Application Programming Interface
24
Manish V Badarkhea59fa012020-07-31 08:38:49 +0100[diff] [blame]25 AT
26 Address Translation
27
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]28 BTI
29 Branch Target Identification. An Armv8.5 extension providing additional
30 control flow integrity around indirect branches and their targets.
31
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]32 CoT
33 COT
34 Chain of Trust
35
36 CSS
37 Compute Sub-System
38
39 CVE
40 Common Vulnerabilities and Exposures. A CVE document is commonly used to
41 describe a publicly-known security vulnerability.
42
43 DS-5
44 Arm Development Studio 5
45
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]46 DSU
47 DynamIQ Shared Unit
48
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]49 DT
50 Device Tree
51
Louis Mayencourt8ac387c2019-11-08 15:09:15 +0000[diff] [blame]52 DTB
53 Device Tree Blob
54
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]55 EL
56 Exception Level
57
58 EHF
59 Exception Handling Framework
60
Louis Mayencourt8ac387c2019-11-08 15:09:15 +0000[diff] [blame]61 FCONF
62 Firmware Configuration Framework
63
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]64 FDT
65 Flattened Device Tree
66
Olivier Deprez2b0be752021-09-01 10:25:21 +0200[diff] [blame]67 FF-A
68 Firmware Framework for Arm A-profile
J-Alves2672cde2020-05-07 18:42:25 +0100[diff] [blame]69
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]70 FIP
71 Firmware Image Package
72
73 FVP
74 Fixed Virtual Platform
75
76 FWU
77 FirmWare Update
78
79 GIC
80 Generic Interrupt Controller
81
82 ISA
83 Instruction Set Architecture
84
85 Linaro
86 A collaborative engineering organization consolidating
87 and optimizing open source software and tools for the Arm architecture.
88
89 MMU
90 Memory Management Unit
91
92 MPAM
93 Memory Partitioning And Monitoring. An optional Armv8.4 extension.
94
Chris Kay03be39d2021-05-05 13:38:30 +0100[diff] [blame]95 MPMM
96 Maximum Power Mitigation Mechanism, an optional power management mechanism
97 supported by some Arm Armv9-A cores.
98
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]99 MPIDR
100 Multiprocessor Affinity Register
101
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]102 MTE
103 Memory Tagging Extension. An optional Armv8.5 extension that enables
104 hardware-assisted memory tagging.
105
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]106 OEN
107 Owning Entity Number
108
109 OP-TEE
110 Open Portable Trusted Execution Environment. An example of a :term:`TEE`
111
112 OTE
113 Open-source Trusted Execution Environment
114
115 PDD
116 Platform Design Document
117
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]118 PAUTH
119 Pointer Authentication. An optional extension introduced in Armv8.3.
120
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]121 PMF
122 Performance Measurement Framework
123
J-Alves2672cde2020-05-07 18:42:25 +0100[diff] [blame]124 PSA
125 Platform Security Architecture
126
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]127 PSCI
128 Power State Coordination Interface
129
130 RAS
131 Reliability, Availability, and Serviceability extensions. A mandatory
132 extension for the Armv8.2 architecture and later. An optional extension to
133 the base Armv8 architecture.
134
135 ROT
136 Root of Trust
137
138 SCMI
139 System Control and Management Interface
140
141 SCP
142 System Control Processor
143
144 SDEI
145 Software Delegated Exception Interface
146
147 SDS
148 Shared Data Storage
149
150 SEA
151 Synchronous External Abort
152
153 SiP
154 SIP
155 Silicon Provider
156
157 SMC
158 Secure Monitor Call
159
160 SMCCC
161 :term:`SMC` Calling Convention
162
163 SoC
164 System on Chip
165
166 SP
167 Secure Partition
168
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]169 SPD
170 Secure Payload Dispatcher
171
172 SPM
173 Secure Partition Manager
174
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]175 SSBS
176 Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
177 bit can be set by software to allow or prevent the hardware from
178 performing speculative operations.
179
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]180 SVE
181 Scalable Vector Extension
182
183 TBB
184 Trusted Board Boot
185
186 TBBR
187 Trusted Board Boot Requirements
188
189 TEE
190 Trusted Execution Environment
191
192 TF-A
193 Trusted Firmware-A
194
195 TF-M
196 Trusted Firmware-M
197
198 TLB
199 Translation Lookaside Buffer
200
201 TLK
202 Trusted Little Kernel. A Trusted OS from NVIDIA.
203
Jimmy Brisson26c5b5c2020-06-22 14:18:42 -0500[diff] [blame]204 TRNG
205 True Randon Number Generator (hardware based)
206
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]207 TSP
208 Test Secure Payload
209
210 TZC
211 TrustZone Controller
212
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]213 UBSAN
214 Undefined Behavior Sanitizer
215
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]216 UEFI
217 Unified Extensible Firmware Interface
218
219 WDOG
220 Watchdog
221
222 XLAT
223 Translation (abbr.). For example, "XLAT table".
224
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]225.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary