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Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]1Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10 :sorted:
11
12 AArch32
13 32-bit execution state of the ARMv8 ISA
14
15 AArch64
16 64-bit execution state of the ARMv8 ISA
17
Chris Kaycda89212021-08-17 16:24:57 +0100[diff] [blame^]18 AMU
19 Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
20 that exposes CPU core runtime metrics as a set of counter registers.
21
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]22 API
23 Application Programming Interface
24
Manish V Badarkhea59fa012020-07-31 08:38:49 +0100[diff] [blame]25 AT
26 Address Translation
27
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]28 BTI
29 Branch Target Identification. An Armv8.5 extension providing additional
30 control flow integrity around indirect branches and their targets.
31
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]32 CoT
33 COT
34 Chain of Trust
35
36 CSS
37 Compute Sub-System
38
39 CVE
40 Common Vulnerabilities and Exposures. A CVE document is commonly used to
41 describe a publicly-known security vulnerability.
42
43 DS-5
44 Arm Development Studio 5
45
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]46 DSU
47 DynamIQ Shared Unit
48
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]49 DT
50 Device Tree
51
Louis Mayencourt8ac387c2019-11-08 15:09:15 +0000[diff] [blame]52 DTB
53 Device Tree Blob
54
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]55 EL
56 Exception Level
57
58 EHF
59 Exception Handling Framework
60
Louis Mayencourt8ac387c2019-11-08 15:09:15 +0000[diff] [blame]61 FCONF
62 Firmware Configuration Framework
63
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]64 FDT
65 Flattened Device Tree
66
Olivier Deprez2b0be752021-09-01 10:25:21 +0200[diff] [blame]67 FF-A
68 Firmware Framework for Arm A-profile
J-Alves2672cde2020-05-07 18:42:25 +0100[diff] [blame]69
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]70 FIP
71 Firmware Image Package
72
73 FVP
74 Fixed Virtual Platform
75
76 FWU
77 FirmWare Update
78
79 GIC
80 Generic Interrupt Controller
81
82 ISA
83 Instruction Set Architecture
84
85 Linaro
86 A collaborative engineering organization consolidating
87 and optimizing open source software and tools for the Arm architecture.
88
89 MMU
90 Memory Management Unit
91
92 MPAM
93 Memory Partitioning And Monitoring. An optional Armv8.4 extension.
94
95 MPIDR
96 Multiprocessor Affinity Register
97
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]98 MTE
99 Memory Tagging Extension. An optional Armv8.5 extension that enables
100 hardware-assisted memory tagging.
101
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]102 OEN
103 Owning Entity Number
104
105 OP-TEE
106 Open Portable Trusted Execution Environment. An example of a :term:`TEE`
107
108 OTE
109 Open-source Trusted Execution Environment
110
111 PDD
112 Platform Design Document
113
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]114 PAUTH
115 Pointer Authentication. An optional extension introduced in Armv8.3.
116
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]117 PMF
118 Performance Measurement Framework
119
J-Alves2672cde2020-05-07 18:42:25 +0100[diff] [blame]120 PSA
121 Platform Security Architecture
122
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]123 PSCI
124 Power State Coordination Interface
125
126 RAS
127 Reliability, Availability, and Serviceability extensions. A mandatory
128 extension for the Armv8.2 architecture and later. An optional extension to
129 the base Armv8 architecture.
130
131 ROT
132 Root of Trust
133
134 SCMI
135 System Control and Management Interface
136
137 SCP
138 System Control Processor
139
140 SDEI
141 Software Delegated Exception Interface
142
143 SDS
144 Shared Data Storage
145
146 SEA
147 Synchronous External Abort
148
149 SiP
150 SIP
151 Silicon Provider
152
153 SMC
154 Secure Monitor Call
155
156 SMCCC
157 :term:`SMC` Calling Convention
158
159 SoC
160 System on Chip
161
162 SP
163 Secure Partition
164
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]165 SPD
166 Secure Payload Dispatcher
167
168 SPM
169 Secure Partition Manager
170
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]171 SSBS
172 Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
173 bit can be set by software to allow or prevent the hardware from
174 performing speculative operations.
175
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]176 SVE
177 Scalable Vector Extension
178
179 TBB
180 Trusted Board Boot
181
182 TBBR
183 Trusted Board Boot Requirements
184
185 TEE
186 Trusted Execution Environment
187
188 TF-A
189 Trusted Firmware-A
190
191 TF-M
192 Trusted Firmware-M
193
194 TLB
195 Translation Lookaside Buffer
196
197 TLK
198 Trusted Little Kernel. A Trusted OS from NVIDIA.
199
Jimmy Brisson26c5b5c2020-06-22 14:18:42 -0500[diff] [blame]200 TRNG
201 True Randon Number Generator (hardware based)
202
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]203 TSP
204 Test Secure Payload
205
206 TZC
207 TrustZone Controller
208
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]209 UBSAN
210 Undefined Behavior Sanitizer
211
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]212 UEFI
213 Unified Extensible Firmware Interface
214
215 WDOG
216 Watchdog
217
218 XLAT
219 Translation (abbr.). For example, "XLAT table".
220
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]221.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary