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Soby Mathewfeac8fc2015-09-29 15:47:16 +01001/*
Soby Mathew7a3b5eb2016-12-09 15:23:08 +00002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Soby Mathewfeac8fc2015-09-29 15:47:16 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soby Mathewfeac8fc2015-09-29 15:47:16 +01005 */
6
7#ifndef __CSS_PM_H__
8#define __CSS_PM_H__
9
10#include <cdefs.h>
11#include <psci.h>
12#include <types.h>
13
Soby Mathew7a3b5eb2016-12-09 15:23:08 +000014/* System power domain at level 2, as currently implemented by CSS platforms */
15#define CSS_SYSTEM_PWR_DMN_LVL ARM_PWR_LVL2
16
Soby Mathew200fffd2016-10-21 11:34:59 +010017/* Macros to read the CSS power domain state */
18#define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0]
19#define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1]
Soby Mathew7a3b5eb2016-12-09 15:23:08 +000020#define CSS_SYSTEM_PWR_STATE(state) \
21 ((PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) ?\
22 (state)->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] : 0)
Soby Mathew200fffd2016-10-21 11:34:59 +010023
Soby Mathewfeac8fc2015-09-29 15:47:16 +010024int css_pwr_domain_on(u_register_t mpidr);
25void css_pwr_domain_on_finish(const psci_power_state_t *target_state);
26void css_pwr_domain_off(const psci_power_state_t *target_state);
27void css_pwr_domain_suspend(const psci_power_state_t *target_state);
28void css_pwr_domain_suspend_finish(
29 const psci_power_state_t *target_state);
30void __dead2 css_system_off(void);
31void __dead2 css_system_reset(void);
32void css_cpu_standby(plat_local_state_t cpu_state);
Soby Mathew61e8d0b2015-10-12 17:32:29 +010033void css_get_sys_suspend_power_state(psci_power_state_t *req_state);
Jeenu Viswambharan9cc4fc02016-08-04 09:43:15 +010034int css_node_hw_state(u_register_t mpidr, unsigned int power_level);
Soby Mathewfeac8fc2015-09-29 15:47:16 +010035
36#endif /* __CSS_PM_H__ */