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Haojian Zhuang5f281b32017-05-24 08:45:05 +08001#
Masahiro Yamada4d156802018-01-26 11:42:01 +09002# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Haojian Zhuang5f281b32017-05-24 08:45:05 +08003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Victor Chong2d9a42d2017-08-17 15:21:10 +09007# Enable version2 of image loading
8LOAD_IMAGE_V2 := 1
9
Haojian Zhuangb755da32018-01-25 16:10:14 +080010# Non-TF Boot ROM
11BL2_AT_EL3 := 1
12
Victor Chongb9a8db22017-05-28 00:14:25 +090013# On Hikey, the TSP can execute from TZC secure area in DRAM (default)
14# or SRAM.
Victor Chong4d64c2b2018-02-01 00:37:49 +090015HIKEY_TSP_RAM_LOCATION ?= dram
Victor Chongb9a8db22017-05-28 00:14:25 +090016ifeq (${HIKEY_TSP_RAM_LOCATION}, dram)
17 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID
18else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram)
Victor Chong4d64c2b2018-02-01 00:37:49 +090019 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID
Victor Chongb9a8db22017-05-28 00:14:25 +090020else
21 $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value")
22endif
23
Haojian Zhuang5f281b32017-05-24 08:45:05 +080024CONSOLE_BASE := PL011_UART3_BASE
25CRASH_CONSOLE_BASE := PL011_UART3_BASE
Haojian Zhuang934ae712017-05-24 08:47:49 +080026PLAT_PARTITION_MAX_ENTRIES := 12
Haojian Zhuang5f281b32017-05-24 08:45:05 +080027PLAT_PL061_MAX_GPIOS := 160
28COLD_BOOT_SINGLE_CPU := 1
29PROGRAMMABLE_RESET_ADDRESS := 1
David Cunadoc5b0c0f2017-10-31 23:19:21 +000030ENABLE_SVE_FOR_NS := 0
Haojian Zhuang5f281b32017-05-24 08:45:05 +080031
32# Process flags
Victor Chongb9a8db22017-05-28 00:14:25 +090033$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID))
Haojian Zhuang5f281b32017-05-24 08:45:05 +080034$(eval $(call add_define,CONSOLE_BASE))
35$(eval $(call add_define,CRASH_CONSOLE_BASE))
36$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
Haojian Zhuang934ae712017-05-24 08:47:49 +080037$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES))
Haojian Zhuang5f281b32017-05-24 08:45:05 +080038
Victor Chong7d787f52017-08-16 13:53:56 +090039# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
40# in the FIP if the platform requires.
41ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090042$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Victor Chong7d787f52017-08-16 13:53:56 +090043endif
44ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090045$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Victor Chong7d787f52017-08-16 13:53:56 +090046endif
47
Haojian Zhuang5f281b32017-05-24 08:45:05 +080048ENABLE_PLAT_COMPAT := 0
49
50USE_COHERENT_MEM := 1
51
52PLAT_INCLUDES := -Iinclude/common/tbbr \
53 -Iinclude/drivers/synopsys \
54 -Iplat/hisilicon/hikey/include
55
56PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011_console.S \
57 lib/aarch64/xlat_tables.c \
58 plat/hisilicon/hikey/aarch64/hikey_common.c
59
60BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \
61 drivers/arm/pl061/pl061_gpio.c \
62 drivers/arm/sp804/sp804_delay_timer.c \
63 drivers/delay_timer/delay_timer.c \
64 drivers/gpio/gpio.c \
65 drivers/io/io_block.c \
66 drivers/io/io_fip.c \
67 drivers/io/io_storage.c \
68 drivers/emmc/emmc.c \
69 drivers/synopsys/emmc/dw_mmc.c \
70 lib/cpus/aarch64/cortex_a53.S \
71 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
72 plat/hisilicon/hikey/hikey_bl1_setup.c \
Haojian Zhuang590188a2018-03-05 13:03:53 +080073 plat/hisilicon/hikey/hikey_bl_common.c \
Haojian Zhuang5f281b32017-05-24 08:45:05 +080074 plat/hisilicon/hikey/hikey_io_storage.c
Haojian Zhuang934ae712017-05-24 08:47:49 +080075
Haojian Zhuang3bd94382018-01-28 23:33:02 +080076BL2_SOURCES += common/desc_image_load.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080077 drivers/arm/pl061/pl061_gpio.c \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080078 drivers/arm/sp804/sp804_delay_timer.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080079 drivers/delay_timer/delay_timer.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080080 drivers/gpio/gpio.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080081 drivers/io/io_block.c \
82 drivers/io/io_fip.c \
83 drivers/io/io_storage.c \
84 drivers/emmc/emmc.c \
85 drivers/synopsys/emmc/dw_mmc.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080086 lib/cpus/aarch64/cortex_a53.S \
Haojian Zhuang934ae712017-05-24 08:47:49 +080087 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080088 plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080089 plat/hisilicon/hikey/hikey_bl2_setup.c \
Haojian Zhuang590188a2018-03-05 13:03:53 +080090 plat/hisilicon/hikey/hikey_bl_common.c \
Jerome Forissierc52e55f2015-05-04 09:40:03 +020091 plat/hisilicon/hikey/hikey_security.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080092 plat/hisilicon/hikey/hikey_ddr.c \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080093 plat/hisilicon/hikey/hikey_image_load.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080094 plat/hisilicon/hikey/hikey_io_storage.c \
95 plat/hisilicon/hikey/hisi_dvfs.c \
96 plat/hisilicon/hikey/hisi_mcu.c
Haojian Zhuang3846f142017-05-24 08:49:26 +080097
Victor Chong7d787f52017-08-16 13:53:56 +090098ifeq (${SPD},opteed)
99BL2_SOURCES += lib/optee/optee_utils.c
100endif
Victor Chong2d9a42d2017-08-17 15:21:10 +0900101
Haojian Zhuang3846f142017-05-24 08:49:26 +0800102HIKEY_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
103 drivers/arm/gic/v2/gicv2_main.c \
104 drivers/arm/gic/v2/gicv2_helpers.c \
105 plat/common/plat_gicv2.c
106
107BL31_SOURCES += drivers/arm/cci/cci.c \
Leo Yand5e2d1a2017-05-27 13:17:45 +0800108 drivers/arm/sp804/sp804_delay_timer.c \
109 drivers/delay_timer/delay_timer.c \
Haojian Zhuang3846f142017-05-24 08:49:26 +0800110 lib/cpus/aarch64/cortex_a53.S \
111 plat/common/aarch64/plat_psci_common.c \
112 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
113 plat/hisilicon/hikey/hikey_bl31_setup.c \
114 plat/hisilicon/hikey/hikey_pm.c \
115 plat/hisilicon/hikey/hikey_topology.c \
116 plat/hisilicon/hikey/hisi_ipc.c \
117 plat/hisilicon/hikey/hisi_pwrc.c \
118 plat/hisilicon/hikey/hisi_pwrc_sram.S \
119 ${HIKEY_GIC_SOURCES}
Vincent Guittot492acec2017-06-07 10:12:05 +0200120ifeq (${ENABLE_PMF}, 1)
121BL31_SOURCES += plat/hisilicon/hikey/hisi_sip_svc.c \
122 lib/pmf/pmf_smc.c
123endif
124
Haojian Zhuang66430832017-06-30 16:21:54 +0800125# Enable workarounds for selected Cortex-A53 errata.
126ERRATA_A53_836870 := 1
127ERRATA_A53_843419 := 1
128ERRATA_A53_855873 := 1
Leo Yan75c83832017-11-22 17:07:09 +0800129
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +0000130WORKAROUND_CVE_2017_5715 := 0
131
Leo Yan75c83832017-11-22 17:07:09 +0800132FIP_ALIGN := 512