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Benjamin Faira42b61b2016-10-14 01:13:46 +00001/*
2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Benjamin Faira42b61b2016-10-14 01:13:46 +00007#include <assert.h>
Benjamin Faira42b61b2016-10-14 01:13:46 +00008#include <stdbool.h>
9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <arch_helpers.h>
11#include <common/debug.h>
12#include <lib/el3_runtime/cpu_data.h>
13#include <lib/psci/psci.h>
14#include <plat/common/platform.h>
15
Andrew F. Davis3afb0052019-02-11 14:37:58 -060016#include <ti_sci_protocol.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000017#include <k3_gicv3.h>
Andrew F. Davis60541b12018-05-24 11:15:42 -050018#include <ti_sci.h>
19
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000020/* Need to flush psci internal locks before shutdown or their values are lost */
21#include "../../../../lib/psci/psci_private.h"
22
Benjamin Faira42b61b2016-10-14 01:13:46 +000023#define STUB() ERROR("stub %s called\n", __func__)
24
25uintptr_t k3_sec_entrypoint;
26
27static void k3_cpu_standby(plat_local_state_t cpu_state)
28{
Andrew F. Davisae40e692018-06-25 12:36:25 -050029 unsigned int scr;
30
31 scr = read_scr_el3();
32 /* Enable the Non secure interrupt to wake the CPU */
33 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT);
34 isb();
35 /* dsb is good practice before using wfi to enter low power states */
Benjamin Faira42b61b2016-10-14 01:13:46 +000036 dsb();
Andrew F. Davisae40e692018-06-25 12:36:25 -050037 /* Enter standby state */
Benjamin Faira42b61b2016-10-14 01:13:46 +000038 wfi();
Andrew F. Davisae40e692018-06-25 12:36:25 -050039 /* Restore SCR */
40 write_scr_el3(scr);
Benjamin Faira42b61b2016-10-14 01:13:46 +000041}
42
43static int k3_pwr_domain_on(u_register_t mpidr)
44{
Andrew F. Davis60541b12018-05-24 11:15:42 -050045 int core_id, proc, device, ret;
46
47 core_id = plat_core_pos_by_mpidr(mpidr);
48 if (core_id < 0) {
49 ERROR("Could not get target core id: %d\n", core_id);
50 return PSCI_E_INTERN_FAIL;
51 }
52
53 proc = PLAT_PROC_START_ID + core_id;
54 device = PLAT_PROC_DEVICE_START_ID + core_id;
55
56 ret = ti_sci_proc_request(proc);
57 if (ret) {
58 ERROR("Request for processor failed: %d\n", ret);
59 return PSCI_E_INTERN_FAIL;
60 }
61
62 ret = ti_sci_proc_set_boot_cfg(proc, k3_sec_entrypoint, 0, 0);
63 if (ret) {
64 ERROR("Request to set core boot address failed: %d\n", ret);
65 return PSCI_E_INTERN_FAIL;
66 }
67
68 ret = ti_sci_device_get(device);
69 if (ret) {
70 ERROR("Request to start core failed: %d\n", ret);
71 return PSCI_E_INTERN_FAIL;
72 }
Benjamin Faira42b61b2016-10-14 01:13:46 +000073
Benjamin Faira42b61b2016-10-14 01:13:46 +000074 return PSCI_E_SUCCESS;
75}
76
77void k3_pwr_domain_off(const psci_power_state_t *target_state)
78{
Andrew F. Davis96243f72019-01-03 13:24:25 -060079 int core_id, proc, device, ret;
Andrew F. Davis7804b272018-08-09 10:01:53 -050080
Benjamin Faira42b61b2016-10-14 01:13:46 +000081 /* Prevent interrupts from spuriously waking up this cpu */
82 k3_gic_cpuif_disable();
83
Andrew F. Davis7804b272018-08-09 10:01:53 -050084 core_id = plat_my_core_pos();
Andrew F. Davis96243f72019-01-03 13:24:25 -060085 proc = PLAT_PROC_START_ID + core_id;
Andrew F. Davis7804b272018-08-09 10:01:53 -050086 device = PLAT_PROC_DEVICE_START_ID + core_id;
87
Andrew F. Davis3afb0052019-02-11 14:37:58 -060088 /* Start by sending wait for WFI command */
89 ret = ti_sci_proc_wait_boot_status_no_wait(proc,
90 /*
91 * Wait maximum time to give us the best chance to get
92 * to WFI before this command timeouts
93 */
94 UINT8_MAX, 100, UINT8_MAX, UINT8_MAX,
95 /* Wait for WFI */
96 PROC_BOOT_STATUS_FLAG_ARMV8_WFI, 0, 0, 0);
97 if (ret) {
98 ERROR("Sending wait for WFI failed (%d)\n", ret);
99 return;
100 }
101
102 /* Now queue up the core shutdown request */
103 ret = ti_sci_device_put_no_wait(device);
Andrew F. Davis7804b272018-08-09 10:01:53 -0500104 if (ret) {
Andrew F. Davis3afb0052019-02-11 14:37:58 -0600105 ERROR("Sending core shutdown message failed (%d)\n", ret);
Andrew F. Davis7804b272018-08-09 10:01:53 -0500106 return;
107 }
Benjamin Faira42b61b2016-10-14 01:13:46 +0000108}
109
110void k3_pwr_domain_on_finish(const psci_power_state_t *target_state)
111{
112 /* TODO: Indicate to System firmware about completion */
113
114 k3_gic_pcpu_init();
115 k3_gic_cpuif_enable();
116}
117
Andrew F. Davis7c461d72018-10-12 15:37:04 -0500118static void __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
119 *target_state)
120{
121 flush_cpu_data(psci_svc_cpu_data);
122 flush_dcache_range((uintptr_t) psci_locks, sizeof(psci_locks));
123 psci_power_down_wfi();
124}
125
Benjamin Faira42b61b2016-10-14 01:13:46 +0000126static void __dead2 k3_system_reset(void)
127{
Andrew F. Davis6a60d022018-05-24 11:15:42 -0500128 /* Send the system reset request to system firmware */
129 ti_sci_core_reboot();
Benjamin Faira42b61b2016-10-14 01:13:46 +0000130
131 while (true)
132 wfi();
133}
134
135static int k3_validate_power_state(unsigned int power_state,
136 psci_power_state_t *req_state)
137{
138 /* TODO: perform the proper validation */
139
140 return PSCI_E_SUCCESS;
141}
142
143static int k3_validate_ns_entrypoint(uintptr_t entrypoint)
144{
145 /* TODO: perform the proper validation */
146
147 return PSCI_E_SUCCESS;
148}
149
150static const plat_psci_ops_t k3_plat_psci_ops = {
151 .cpu_standby = k3_cpu_standby,
152 .pwr_domain_on = k3_pwr_domain_on,
153 .pwr_domain_off = k3_pwr_domain_off,
154 .pwr_domain_on_finish = k3_pwr_domain_on_finish,
Andrew F. Davis7c461d72018-10-12 15:37:04 -0500155 .pwr_domain_pwr_down_wfi = k3_pwr_domain_pwr_down_wfi,
Benjamin Faira42b61b2016-10-14 01:13:46 +0000156 .system_reset = k3_system_reset,
157 .validate_power_state = k3_validate_power_state,
158 .validate_ns_entrypoint = k3_validate_ns_entrypoint
159};
160
161int plat_setup_psci_ops(uintptr_t sec_entrypoint,
162 const plat_psci_ops_t **psci_ops)
163{
164 k3_sec_entrypoint = sec_entrypoint;
165
166 *psci_ops = &k3_plat_psci_ops;
167
168 return 0;
169}