blob: fca6f4f95149ed9feb98baae59fd2c6525ce5eb3 [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06002# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Soby Mathew0d268dc2016-07-11 14:13:56 +01009ifeq (${ARCH}, aarch64)
10 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
11 # DRAM (if available) or the TZC secured area of DRAM.
Dimitris Papastamos8a418592018-01-02 10:25:50 +000012 # TZC secured DRAM is the default.
Dan Handley9df48042015-03-19 18:58:55 +000013
Dimitris Papastamos8a418592018-01-02 10:25:50 +000014 ARM_TSP_RAM_LOCATION ?= dram
Qixiang Xuc7b12c52017-10-13 09:04:12 +080015
Soby Mathew0d268dc2016-07-11 14:13:56 +010016 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
18 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
19 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
20 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
21 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
22 else
23 $(error "Unsupported ARM_TSP_RAM_LOCATION value")
24 endif
Dan Handley9df48042015-03-19 18:58:55 +000025
Soby Mathew0d268dc2016-07-11 14:13:56 +010026 # Process flags
Soby Mathew0d268dc2016-07-11 14:13:56 +010027 # Process ARM_BL31_IN_DRAM flag
28 ARM_BL31_IN_DRAM := 0
29 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
30 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Roberto Vargasac6dc352017-10-20 10:46:23 +010031else
32 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
Soby Mathew0d268dc2016-07-11 14:13:56 +010033endif
Dan Handley9df48042015-03-19 18:58:55 +000034
Roberto Vargasac6dc352017-10-20 10:46:23 +010035$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
36
37
Soby Mathew7799cf72015-04-16 14:49:09 +010038# For the original power-state parameter format, the State-ID can be encoded
39# according to the recommended encoding or zero. This flag determines which
40# State-ID encoding to be parsed.
41ARM_RECOM_STATE_ID_ENC := 0
42
Douglas Raillard66933ff2016-11-07 17:29:34 +000043# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
44# be set. Else throw a build error.
Soby Mathew7799cf72015-04-16 14:49:09 +010045ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
46 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard66933ff2016-11-07 17:29:34 +000047 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
48 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew7799cf72015-04-16 14:49:09 +010049 endif
50endif
51
52# Process ARM_RECOM_STATE_ID_ENC flag
53$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
54$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
55
Juan Castillob6132f12015-10-06 14:01:35 +010056# Process ARM_DISABLE_TRUSTED_WDOG flag
Zelalem Awekeaf7e3a42021-10-01 12:30:49 -050057# By default, Trusted Watchdog is always enabled unless
58# SPIN_ON_BL1_EXIT or ENABLE_RME is set
Juan Castillob6132f12015-10-06 14:01:35 +010059ARM_DISABLE_TRUSTED_WDOG := 0
Zelalem Awekeaf7e3a42021-10-01 12:30:49 -050060ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
Juan Castillob6132f12015-10-06 14:01:35 +010061ARM_DISABLE_TRUSTED_WDOG := 1
62endif
63$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
64$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
65
Juan Castilloaadf19a2015-11-06 16:02:32 +000066# Process ARM_CONFIG_CNTACR
67ARM_CONFIG_CNTACR := 1
68$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
69$(eval $(call add_define,ARM_CONFIG_CNTACR))
70
David Wang0ba499f2016-03-07 11:02:57 +080071# Process ARM_BL31_IN_DRAM flag
72ARM_BL31_IN_DRAM := 0
73$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
74$(eval $(call add_define,ARM_BL31_IN_DRAM))
75
Sandrine Bailleux2af9c392022-07-04 11:17:43 +020076# As per CCA security model, all root firmware must execute from on-chip secure
77# memory. This means we must not run BL31 from TZC-protected DRAM.
78ifeq (${ARM_BL31_IN_DRAM},1)
79 ifeq (${ENABLE_RME},1)
80 $(error "BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0")
81 endif
82endif
83
Summer Qin93c812f2017-02-28 16:46:17 +000084# Process ARM_PLAT_MT flag
85ARM_PLAT_MT := 0
86$(eval $(call assert_boolean,ARM_PLAT_MT))
87$(eval $(call add_define,ARM_PLAT_MT))
88
Antonio Nino Diazf09d0032017-04-11 14:04:56 +010089# Use translation tables library v2 by default
90ARM_XLAT_TABLES_LIB_V1 := 0
91$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
92$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
93
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010094# Don't have the Linux kernel as a BL33 image by default
95ARM_LINUX_KERNEL_AS_BL33 := 0
96$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
97$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
98
99ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
Andre Przywara6a3ac4e2021-02-08 17:40:48 +0000100 ifneq (${ARCH},aarch64)
Manish Pandey37c4ec22018-11-02 13:28:25 +0000101 ifneq (${RESET_TO_SP_MIN},1)
102 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
103 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100104 endif
105 ifndef PRELOADED_BL33_BASE
106 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
107 endif
Zelalem Aweke1e8e3fd2021-07-26 21:39:05 -0500108 ifeq (${RESET_TO_BL31},1)
109 ifndef ARM_PRELOADED_DTB_BASE
110 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is
111 used with RESET_TO_BL31.")
112 endif
113 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100114 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100115endif
116
Mikael Olsson3288b462022-08-15 17:12:58 +0200117# Arm(R) Ethos(TM)-N NPU SiP service
Mikael Olsson7da66192021-02-12 17:30:22 +0100118ARM_ETHOSN_NPU_DRIVER := 0
119$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER))
120$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER))
121
Bjorn Engstrom74c5f872022-08-26 09:45:45 +0200122# Arm(R) Ethos(TM)-N NPU TZMP1
123ARM_ETHOSN_NPU_TZMP1 := 0
124$(eval $(call assert_boolean,ARM_ETHOSN_NPU_TZMP1))
125$(eval $(call add_define,ARM_ETHOSN_NPU_TZMP1))
126ifeq (${ARM_ETHOSN_NPU_TZMP1},1)
127 ifeq (${ARM_ETHOSN_NPU_DRIVER},0)
128 $(error ARM_ETHOSN_NPU_TZMP1 is only available if ARM_ETHOSN_NPU_DRIVER=1)
129 endif
130 ifeq (${PLAT},juno)
131 $(eval $(call add_define,JUNO_ETHOSN_TZMP1))
132 else
133 $(error ARM_ETHOSN_NPU_TZMP1 only supported on Juno platform, not ${PLAT})
134 endif
Rob Hughes9a2177a2023-01-17 16:10:26 +0000135
136 ifeq (${TRUSTED_BOARD_BOOT},0)
137 # We rely on TRUSTED_BOARD_BOOT to prevent the firmware code from being
138 # tampered with, which is required to protect the confidentiality of protected
139 # inference data.
140 $(error ARM_ETHOSN_NPU_TZMP1 is only available if TRUSTED_BOARD_BOOT is enabled)
141 endif
142
143 # We need the FW certificate and key certificate
144 $(eval $(call TOOL_ADD_PAYLOAD,${BUILD_PLAT}/npu_fw_key.crt,--npu-fw-key-cert))
145 $(eval $(call TOOL_ADD_PAYLOAD,${BUILD_PLAT}/npu_fw_content.crt,--npu-fw-cert))
146 # Needed for our OIDs to be available in tbbr_cot_bl2.c
147 $(eval $(call add_define, PLAT_DEF_OID))
148 PLAT_INCLUDES += -I${PLAT_DIR}certificate/include
149 PLAT_INCLUDES += -Iinclude/drivers/arm/
150
151 # We need the firmware to be built into the FIP
152 $(eval $(call TOOL_ADD_IMG,ARM_ETHOSN_NPU_FW,--npu-fw))
153
154 # Needed so that UUIDs from the FIP are available in BL2
155 $(eval $(call add_define,PLAT_DEF_FIP_UUID))
156 PLAT_INCLUDES += -I${PLAT_DIR}fip
157endif # ARM_ETHOSN_NPU_TZMP1
Bjorn Engstrom74c5f872022-08-26 09:45:45 +0200158
Antonio Nino Diaz01b6cb92017-05-24 14:11:07 +0100159# Use an implementation of SHA-256 with a smaller memory footprint but reduced
160# speed.
161$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
162
Summer Qin80726782017-04-20 16:28:39 +0100163# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
164# in the FIP if the platform requires.
165ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900166$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Summer Qin80726782017-04-20 16:28:39 +0100167endif
168ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900169$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Summer Qin80726782017-04-20 16:28:39 +0100170endif
171
Soby Mathew421dbc42016-05-23 16:07:53 +0100172# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew0d268dc2016-07-11 14:13:56 +0100173ENABLE_PSCI_STAT := 1
dp-arm66abfbe2017-01-31 13:01:04 +0000174ENABLE_PMF := 1
Soby Mathew421dbc42016-05-23 16:07:53 +0100175
Alexei Fedorov2381d2e2020-09-01 15:38:32 +0100176# Override the standard libc with optimised libc_asm
177OVERRIDE_LIBC := 1
178ifeq (${OVERRIDE_LIBC},1)
179 include lib/libc/libc_asm.mk
180endif
181
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100182# On ARM platforms, separate the code and read-only data sections to allow
183# mapping the former as executable and the latter as execute-never.
184SEPARATE_CODE_AND_RODATA := 1
185
Madhukar Pappireddyd7419442020-01-27 15:38:26 -0600186# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
187# and NOBITS sections of BL31 image are adjacent to each other and loaded
188# into Trusted SRAM.
189SEPARATE_NOBITS_REGION := 0
190
191# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
192# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
193# the build to require that ARM_BL31_IN_DRAM is enabled as well.
194ifeq ($(SEPARATE_NOBITS_REGION),1)
195 ifneq ($(ARM_BL31_IN_DRAM),1)
196 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
197 endif
198 ifneq ($(RECLAIM_INIT_CODE),0)
199 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
200 endif
201endif
202
Soby Mathew7e4d6652017-05-10 11:50:30 +0100203# Disable ARM Cryptocell by default
204ARM_CRYPTOCELL_INTEG := 0
205$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
206$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
207
Manish Pandey928da862021-06-10 15:22:48 +0100208# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
209ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
210 ENABLE_PIE := 1
Manish Pandey2207e932019-11-06 13:17:46 +0000211endif
212
Soby Mathewb9856482018-09-18 11:42:42 +0100213# CryptoCell integration relies on coherent buffers for passing data from
214# the AP CPU to the CryptoCell
215ifeq (${ARM_CRYPTOCELL_INTEG},1)
216 ifeq (${USE_COHERENT_MEM},0)
217 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
218 endif
219endif
220
Manish V Badarkhedd6f2522021-02-22 17:30:17 +0000221# Disable GPT parser support, use FIP image by default
222ARM_GPT_SUPPORT := 0
223$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
224$(eval $(call add_define,ARM_GPT_SUPPORT))
225
226# Include necessary sources to parse GPT image
227ifeq (${ARM_GPT_SUPPORT}, 1)
228 BL2_SOURCES += drivers/partition/gpt.c \
229 drivers/partition/partition.c
230endif
231
Manish V Badarkhe7a867922021-04-22 14:41:27 +0100232# Enable CRC instructions via extension for ARMv8-A CPUs.
233# For ARMv8.1-A, and onwards CRC instructions are default enabled.
234# Enable HW computed CRC support unconditionally in BL2 component.
Diego Sueiro4d708ac2022-11-03 17:01:39 +0000235ifeq (${ARM_ARCH_MAJOR},8)
236 ifeq (${ARM_ARCH_MINOR},0)
237 BL2_CPPFLAGS += -march=armv8-a+crc
238 endif
Manish V Badarkhe7a867922021-04-22 14:41:27 +0100239endif
240
Manish V Badarkhed2f0a7a2021-06-25 23:43:33 +0100241ifeq ($(PSA_FWU_SUPPORT),1)
242 # GPT support is recommended as per PSA FWU specification hence
243 # PSA FWU implementation is tightly coupled with GPT support,
244 # and it does not support other formats.
245 ifneq ($(ARM_GPT_SUPPORT),1)
246 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
247 endif
248 FWU_MK := drivers/fwu/fwu.mk
249 $(info Including ${FWU_MK})
250 include ${FWU_MK}
251endif
252
Soby Mathew0d268dc2016-07-11 14:13:56 +0100253ifeq (${ARCH}, aarch64)
254PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
255endif
Dan Handley9df48042015-03-19 18:58:55 +0000256
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100257PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100258 plat/arm/common/arm_common.c \
259 plat/arm/common/arm_console.c
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100260
261ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
Gary Morrison3d7f6542021-01-27 13:08:47 -0600262PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100263 lib/xlat_tables/${ARCH}/xlat_tables.c
264else
Gary Morrison3d7f6542021-01-27 13:08:47 -0600265ifeq (${XLAT_MPU_LIB_V1}, 1)
266include lib/xlat_mpu/xlat_mpu.mk
267PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS}
268else
Antonio Nino Diaz719bf852017-02-23 17:22:58 +0000269include lib/xlat_tables_v2/xlat_tables.mk
Gary Morrison3d7f6542021-01-27 13:08:47 -0600270PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
271endif
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100272endif
Dan Handley9df48042015-03-19 18:58:55 +0000273
Louis Mayencourt6b232d92020-02-28 16:57:30 +0000274ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100275 plat/arm/common/fconf/arm_fconf_io.c
Olivier Deprez93df21f2020-01-23 11:24:33 +0100276ifeq (${SPD},spmd)
Balint Dobszay719ba9c2021-03-26 16:23:18 +0100277 ifeq (${BL2_ENABLE_SP_LOAD},1)
Olivier Deprez042db532020-03-19 09:27:11 +0100278 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
279 endif
Olivier Deprez93df21f2020-01-23 11:24:33 +0100280endif
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100281
Aditya Angadi20b48412019-04-16 11:29:14 +0530282BL1_SOURCES += drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000283 drivers/io/io_memmap.c \
284 drivers/io/io_storage.c \
285 plat/arm/common/arm_bl1_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000286 plat/arm/common/arm_err.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100287 ${ARM_IO_SOURCES}
288
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000289ifdef EL3_PAYLOAD_BASE
Dimitris Papastamosd7a36512018-06-18 13:01:06 +0100290# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000291# their holding pen
292BL1_SOURCES += plat/arm/common/arm_pm.c
293endif
Dan Handley9df48042015-03-19 18:58:55 +0000294
Soby Mathew1ced6b82017-06-12 12:37:10 +0100295BL2_SOURCES += drivers/delay_timer/delay_timer.c \
296 drivers/delay_timer/generic_delay_timer.c \
297 drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000298 drivers/io/io_memmap.c \
299 drivers/io/io_storage.c \
300 plat/arm/common/arm_bl2_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000301 plat/arm/common/arm_err.c \
Manish V Badarkhea26bf352021-07-02 20:29:56 +0100302 common/tf_crc32.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100303 ${ARM_IO_SOURCES}
Roberto Vargas52207802017-11-17 13:22:18 +0000304
Louis Mayencourt944ade82019-08-08 12:03:26 +0100305# Firmware Configuration Framework sources
306include lib/fconf/fconf.mk
Roberto Vargas52207802017-11-17 13:22:18 +0000307
Chris Kayb296ada2021-05-20 13:22:43 +0100308BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
309BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
310
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000311# Add `libfdt` and Arm common helpers required for Dynamic Config
312include lib/libfdt/libfdt.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100313
314DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000315 plat/arm/common/arm_dyn_cfg_helpers.c \
David Horstmannb2df4c12021-04-08 14:50:21 +0100316 common/uuid.c
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000317
Chris Kaye9272152021-09-28 15:52:14 +0100318DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES}
319
Soby Mathew45e39e22018-03-26 15:16:46 +0100320BL1_SOURCES += ${DYN_CFG_SOURCES}
321BL2_SOURCES += ${DYN_CFG_SOURCES}
322
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600323ifeq (${RESET_TO_BL2},1)
Roberto Vargas52207802017-11-17 13:22:18 +0000324BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
325endif
326
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000327# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
328# the AArch32 descriptors.
329ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
330BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
331else
Vishnu Banavath2b651ea2022-01-19 18:43:12 +0000332ifneq (${PLAT}, corstone1000)
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000333BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
334endif
Abdellatif El Khlifiad9b8e52021-04-21 17:20:43 +0100335endif
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000336BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100337 common/desc_image_load.c
Summer Qin9db8f2e2017-04-24 16:49:28 +0100338ifeq (${SPD},opteed)
339BL2_SOURCES += lib/optee/optee_utils.c
340endif
Dan Handley9df48042015-03-19 18:58:55 +0000341
Soby Mathew1ced6b82017-06-12 12:37:10 +0100342BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
343 drivers/delay_timer/generic_delay_timer.c \
344 plat/arm/common/arm_bl2u_setup.c
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100345
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000346BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handley9df48042015-03-19 18:58:55 +0000347 plat/arm/common/arm_pm.c \
Dan Handley9df48042015-03-19 18:58:55 +0000348 plat/arm/common/arm_topology.c \
Soby Mathewf6c41082016-05-03 12:31:18 +0100349 plat/common/plat_psci_common.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100350
Mikael Olsson7da66192021-02-12 17:30:22 +0100351ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),)
352ARM_SVC_HANDLER_SRCS :=
353
354ifeq (${ENABLE_PMF},1)
355ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c
356endif
357
358ifeq (${ARM_ETHOSN_NPU_DRIVER},1)
359ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \
360 drivers/delay_timer/delay_timer.c \
361 drivers/arm/ethosn/ethosn_smc.c
Mikael Olssona7df0d62023-01-13 09:56:41 +0100362ifeq (${ARM_ETHOSN_NPU_TZMP1},1)
363ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c
364endif
Mikael Olsson7da66192021-02-12 17:30:22 +0100365endif
366
Bence Szépkúti16362c62019-10-24 15:53:23 +0200367ifeq (${ARCH}, aarch64)
368BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
369 plat/arm/common/arm_sip_svc.c \
Mikael Olsson7da66192021-02-12 17:30:22 +0100370 ${ARM_SVC_HANDLER_SRCS}
Bence Szépkúti78dc10c2019-11-07 12:09:24 +0100371else
372BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
Mikael Olsson7da66192021-02-12 17:30:22 +0100373 ${ARM_SVC_HANDLER_SRCS}
dp-arm1cebefd2016-09-19 11:21:03 +0100374endif
Bence Szépkúti16362c62019-10-24 15:53:23 +0200375endif
dp-arm1cebefd2016-09-19 11:21:03 +0100376
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100377ifeq (${EL3_EXCEPTION_HANDLING},1)
Sandeep Tripathy1c478392020-08-12 18:42:13 +0530378BL31_SOURCES += plat/common/aarch64/plat_ehf.c
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100379endif
380
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100381ifeq (${SDEI_SUPPORT},1)
382BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
Balint Dobszayd0dbd5e2019-12-18 15:28:00 +0100383ifeq (${SDEI_IN_FCONF},1)
384BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
385endif
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100386endif
387
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000388# RAS sources
389ifeq (${RAS_EXTENSION},1)
390BL31_SOURCES += lib/extensions/ras/std_err_record.c \
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100391 lib/extensions/ras/ras_common.c
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000392endif
393
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000394# Pointer Authentication sources
395ifeq (${ENABLE_PAUTH}, 1)
Boyan Karatotev02576932023-01-13 16:47:07 +0000396PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000397endif
398
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100399ifeq (${SPD},spmd)
400BL31_SOURCES += plat/common/plat_spmd_manifest.c \
David Horstmannb2df4c12021-04-08 14:50:21 +0100401 common/uuid.c \
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100402 ${LIBFDT_SRCS}
403
Chris Kaye9272152021-09-28 15:52:14 +0100404BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100405endif
406
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100407ifeq (${DRTM_SUPPORT},1)
408BL31_SOURCES += plat/arm/common/arm_err.c
409endif
410
Juan Castilloa08a5e72015-05-19 11:54:12 +0100411ifneq (${TRUSTED_BOARD_BOOT},0)
412
Juan Castilloa08a5e72015-05-19 11:54:12 +0100413 # Include common TBB sources
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000414 AUTH_SOURCES := drivers/auth/auth_mod.c \
415 drivers/auth/img_parser_mod.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100416
417 # Include the selected chain of trust sources.
418 ifeq (${COT},tbbr)
laurenw-arm56f1e3e2021-03-03 14:19:38 -0600419 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
Manish V Badarkhe39317ab2020-07-23 10:43:57 +0100420 drivers/auth/tbbr/tbbr_cot_bl1.c
421 ifneq (${COT_DESC_IN_DTB},0)
422 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
423 else
Rob Hughes9a2177a2023-01-17 16:10:26 +0000424 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c
425 # Juno has its own TBBR CoT file for BL2
426 ifneq (${PLAT},juno)
427 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_bl2.c
428 endif
Manish V Badarkhe39317ab2020-07-23 10:43:57 +0100429 endif
Sandrine Bailleux012f8712020-02-06 14:59:33 +0100430 else ifeq (${COT},dualroot)
431 AUTH_SOURCES += drivers/auth/dualroot/cot.c
laurenw-armd3449782022-04-21 16:50:49 -0500432 else ifeq (${COT},cca)
433 AUTH_SOURCES += drivers/auth/cca/cot.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100434 else
435 $(error Unknown chain of trust ${COT})
436 endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100437
Yatharth Kocharf11b29a2016-02-01 11:04:46 +0000438 BL1_SOURCES += ${AUTH_SOURCES} \
439 bl1/tbbr/tbbr_img_desc.c \
dp-armb3e85802016-12-12 14:48:13 +0000440 plat/arm/common/arm_bl1_fwu.c \
441 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100442
dp-armb3e85802016-12-12 14:48:13 +0000443 BL2_SOURCES += ${AUTH_SOURCES} \
Manish V Badarkhefe46f5f2020-05-27 09:39:42 +0100444 plat/common/tbbr/plat_tbbr.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100445
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900446 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
Yatharth Kochard1a93432015-10-12 12:33:47 +0100447
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000448 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
449
450 $(info Including ${IMG_PARSER_LIB_MK})
451 include ${IMG_PARSER_LIB_MK}
452endif
453
Manish V Badarkhee112a5a2021-10-06 23:41:50 +0100454# Include Measured Boot makefile before any Crypto library makefile.
455# Crypto library makefile may need default definitions of Measured Boot build
456# flags present in Measured Boot makefile.
Manish V Badarkhe19b22f92022-06-17 11:42:17 +0100457ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
Manish V Badarkhee112a5a2021-10-06 23:41:50 +0100458 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
459 $(info Including ${MEASURED_BOOT_MK})
460 include ${MEASURED_BOOT_MK}
Manish V Badarkhef9c366c2022-01-18 22:40:17 +0000461
laurenw-arm7834aa02022-05-31 16:39:09 -0500462 ifneq (${MBOOT_EL_HASH_ALG}, sha256)
463 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
464 endif
465
Manish V Badarkhe19b22f92022-06-17 11:42:17 +0100466 ifeq (${MEASURED_BOOT},1)
467 BL1_SOURCES += ${EVENT_LOG_SOURCES}
468 BL2_SOURCES += ${EVENT_LOG_SOURCES}
469 endif
470
471 ifeq (${DRTM_SUPPORT},1)
472 BL31_SOURCES += ${EVENT_LOG_SOURCES}
473 endif
Manish V Badarkhee112a5a2021-10-06 23:41:50 +0100474endif
475
Manish V Badarkhebf4db5c2022-02-25 09:06:57 +0000476ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000477 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \
478 lib/fconf/fconf_tbbr_getter.c
479 BL1_SOURCES += ${CRYPTO_SOURCES}
480 BL2_SOURCES += ${CRYPTO_SOURCES}
Manish V Badarkhebf4db5c2022-02-25 09:06:57 +0000481 BL31_SOURCES += drivers/auth/crypto_mod.c
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000482
Juan Castilloa08a5e72015-05-19 11:54:12 +0100483 # We expect to locate the *.mk files under the directories specified below
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000484 ifeq (${ARM_CRYPTOCELL_INTEG},0)
485 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
486 else
487 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
488 endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100489
490 $(info Including ${CRYPTO_LIB_MK})
491 include ${CRYPTO_LIB_MK}
Juan Castilloa08a5e72015-05-19 11:54:12 +0100492endif
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100493
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100494ifeq (${RECLAIM_INIT_CODE}, 1)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100495 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
496 $(error "To reclaim init code xlat tables v2 must be used")
497 endif
498endif