Ghennadi Procopciuc | ecc98d2 | 2024-06-12 07:38:52 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2020-2024 NXP |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | #include <s32cc-clk-ids.h> |
| 7 | #include <s32cc-clk-modules.h> |
| 8 | #include <s32cc-clk-utils.h> |
| 9 | |
Ghennadi Procopciuc | 2be71a3 | 2024-06-12 12:06:36 +0300 | [diff] [blame] | 10 | #define S32CC_A53_MIN_FREQ (48UL * MHZ) |
| 11 | #define S32CC_A53_MAX_FREQ (1000UL * MHZ) |
| 12 | |
Ghennadi Procopciuc | ecc98d2 | 2024-06-12 07:38:52 +0300 | [diff] [blame] | 13 | /* Oscillators */ |
| 14 | static struct s32cc_osc fxosc = |
| 15 | S32CC_OSC_INIT(S32CC_FXOSC); |
| 16 | static struct s32cc_clk fxosc_clk = |
| 17 | S32CC_MODULE_CLK(fxosc); |
| 18 | |
| 19 | static struct s32cc_osc firc = |
| 20 | S32CC_OSC_INIT(S32CC_FIRC); |
| 21 | static struct s32cc_clk firc_clk = |
| 22 | S32CC_MODULE_CLK(firc); |
| 23 | |
| 24 | static struct s32cc_osc sirc = |
| 25 | S32CC_OSC_INIT(S32CC_SIRC); |
| 26 | static struct s32cc_clk sirc_clk = |
| 27 | S32CC_MODULE_CLK(sirc); |
| 28 | |
Ghennadi Procopciuc | 7277b97 | 2024-06-12 09:53:18 +0300 | [diff] [blame] | 29 | /* ARM PLL */ |
| 30 | static struct s32cc_clkmux arm_pll_mux = |
| 31 | S32CC_CLKMUX_INIT(S32CC_ARM_PLL, 0, 2, |
| 32 | S32CC_CLK_FIRC, |
| 33 | S32CC_CLK_FXOSC, 0, 0, 0); |
| 34 | static struct s32cc_clk arm_pll_mux_clk = |
| 35 | S32CC_MODULE_CLK(arm_pll_mux); |
| 36 | static struct s32cc_pll armpll = |
| 37 | S32CC_PLL_INIT(arm_pll_mux_clk, S32CC_ARM_PLL, 2); |
| 38 | static struct s32cc_clk arm_pll_vco_clk = |
| 39 | S32CC_FREQ_MODULE_CLK(armpll, 1400 * MHZ, 2000 * MHZ); |
| 40 | |
| 41 | static struct s32cc_pll_out_div arm_pll_phi0_div = |
| 42 | S32CC_PLL_OUT_DIV_INIT(armpll, 0); |
| 43 | static struct s32cc_clk arm_pll_phi0_clk = |
| 44 | S32CC_FREQ_MODULE_CLK(arm_pll_phi0_div, 0, GHZ); |
| 45 | |
Ghennadi Procopciuc | 6494966 | 2024-08-05 16:49:51 +0300 | [diff] [blame] | 46 | /* ARM DFS */ |
| 47 | static struct s32cc_dfs armdfs = |
| 48 | S32CC_DFS_INIT(armpll, S32CC_ARM_DFS); |
| 49 | static struct s32cc_dfs_div arm_dfs1_div = |
| 50 | S32CC_DFS_DIV_INIT(armdfs, 0); |
| 51 | static struct s32cc_clk arm_dfs1_clk = |
| 52 | S32CC_FREQ_MODULE_CLK(arm_dfs1_div, 0, 800 * MHZ); |
| 53 | |
| 54 | /* MC_CGM0 */ |
| 55 | static struct s32cc_clkmux cgm0_mux0 = |
| 56 | S32CC_SHARED_CLKMUX_INIT(S32CC_CGM0, 0, 2, |
| 57 | S32CC_CLK_FIRC, |
| 58 | S32CC_CLK_ARM_PLL_DFS1, 0, 0, 0); |
| 59 | static struct s32cc_clk cgm0_mux0_clk = S32CC_MODULE_CLK(cgm0_mux0); |
| 60 | |
Ghennadi Procopciuc | 0609bcd | 2024-08-06 13:25:51 +0300 | [diff] [blame] | 61 | static struct s32cc_clkmux cgm0_mux8 = |
| 62 | S32CC_SHARED_CLKMUX_INIT(S32CC_CGM0, 8, 3, |
| 63 | S32CC_CLK_FIRC, |
| 64 | S32CC_CLK_PERIPH_PLL_PHI3, |
| 65 | S32CC_CLK_FXOSC, 0, 0); |
| 66 | static struct s32cc_clk cgm0_mux8_clk = S32CC_MODULE_CLK(cgm0_mux8); |
| 67 | |
Ghennadi Procopciuc | 6494966 | 2024-08-05 16:49:51 +0300 | [diff] [blame] | 68 | /* XBAR */ |
| 69 | static struct s32cc_clk xbar_2x_clk = |
| 70 | S32CC_CHILD_CLK(cgm0_mux0_clk, 48 * MHZ, 800 * MHZ); |
| 71 | static struct s32cc_fixed_div xbar_div2 = |
| 72 | S32CC_FIXED_DIV_INIT(cgm0_mux0_clk, 2); |
| 73 | static struct s32cc_clk xbar_clk = |
| 74 | S32CC_FREQ_MODULE_CLK(xbar_div2, 24 * MHZ, 400 * MHZ); |
| 75 | static struct s32cc_fixed_div xbar_div4 = |
| 76 | S32CC_FIXED_DIV_INIT(cgm0_mux0_clk, 4); |
| 77 | static struct s32cc_clk xbar_div2_clk = |
| 78 | S32CC_FREQ_MODULE_CLK(xbar_div4, 12 * MHZ, 200 * MHZ); |
| 79 | static struct s32cc_fixed_div xbar_div6 = |
| 80 | S32CC_FIXED_DIV_INIT(cgm0_mux0_clk, 6); |
| 81 | static struct s32cc_clk xbar_div3_clk = |
| 82 | S32CC_FREQ_MODULE_CLK(xbar_div6, 8 * MHZ, 133333333); |
| 83 | static struct s32cc_fixed_div xbar_div8 = |
| 84 | S32CC_FIXED_DIV_INIT(cgm0_mux0_clk, 8); |
| 85 | static struct s32cc_clk xbar_div4_clk = |
| 86 | S32CC_FREQ_MODULE_CLK(xbar_div8, 6 * MHZ, 100 * MHZ); |
| 87 | static struct s32cc_fixed_div xbar_div12 = |
| 88 | S32CC_FIXED_DIV_INIT(cgm0_mux0_clk, 12); |
| 89 | static struct s32cc_clk xbar_div6_clk = |
| 90 | S32CC_FREQ_MODULE_CLK(xbar_div12, 4 * MHZ, 66666666); |
| 91 | |
Ghennadi Procopciuc | 0609bcd | 2024-08-06 13:25:51 +0300 | [diff] [blame] | 92 | /* Linflex */ |
| 93 | static struct s32cc_clk linflex_baud_clk = |
| 94 | S32CC_CHILD_CLK(cgm0_mux8_clk, 19200, 133333333); |
| 95 | static struct s32cc_fixed_div linflex_div = |
| 96 | S32CC_FIXED_DIV_INIT(linflex_baud_clk, 2); |
| 97 | static struct s32cc_clk linflex_clk = |
| 98 | S32CC_FREQ_MODULE_CLK(linflex_div, 9600, 66666666); |
| 99 | |
Ghennadi Procopciuc | 8384d18 | 2024-06-12 10:53:06 +0300 | [diff] [blame] | 100 | /* MC_CGM1 */ |
| 101 | static struct s32cc_clkmux cgm1_mux0 = |
| 102 | S32CC_SHARED_CLKMUX_INIT(S32CC_CGM1, 0, 3, |
| 103 | S32CC_CLK_FIRC, |
| 104 | S32CC_CLK_ARM_PLL_PHI0, |
| 105 | S32CC_CLK_ARM_PLL_DFS2, 0, 0); |
| 106 | static struct s32cc_clk cgm1_mux0_clk = S32CC_MODULE_CLK(cgm1_mux0); |
| 107 | |
Ghennadi Procopciuc | 2be71a3 | 2024-06-12 12:06:36 +0300 | [diff] [blame] | 108 | /* A53_CORE */ |
| 109 | static struct s32cc_clk a53_core_clk = |
| 110 | S32CC_FREQ_MODULE_CLK(cgm1_mux0_clk, S32CC_A53_MIN_FREQ, |
| 111 | S32CC_A53_MAX_FREQ); |
| 112 | /* A53_CORE_DIV2 */ |
| 113 | static struct s32cc_fixed_div a53_core_div2 = |
| 114 | S32CC_FIXED_DIV_INIT(cgm1_mux0_clk, 2); |
| 115 | static struct s32cc_clk a53_core_div2_clk = |
| 116 | S32CC_FREQ_MODULE_CLK(a53_core_div2, S32CC_A53_MIN_FREQ / 2, |
| 117 | S32CC_A53_MAX_FREQ / 2); |
| 118 | /* A53_CORE_DIV10 */ |
| 119 | static struct s32cc_fixed_div a53_core_div10 = |
| 120 | S32CC_FIXED_DIV_INIT(cgm1_mux0_clk, 10); |
| 121 | static struct s32cc_clk a53_core_div10_clk = |
| 122 | S32CC_FREQ_MODULE_CLK(a53_core_div10, S32CC_A53_MIN_FREQ / 10, |
| 123 | S32CC_A53_MAX_FREQ / 10); |
| 124 | |
Ghennadi Procopciuc | 22f9474 | 2024-08-06 11:48:11 +0300 | [diff] [blame] | 125 | /* PERIPH PLL */ |
| 126 | static struct s32cc_clkmux periph_pll_mux = |
| 127 | S32CC_CLKMUX_INIT(S32CC_PERIPH_PLL, 0, 2, |
| 128 | S32CC_CLK_FIRC, |
| 129 | S32CC_CLK_FXOSC, 0, 0, 0); |
| 130 | static struct s32cc_clk periph_pll_mux_clk = |
| 131 | S32CC_MODULE_CLK(periph_pll_mux); |
| 132 | static struct s32cc_pll periphpll = |
| 133 | S32CC_PLL_INIT(periph_pll_mux_clk, S32CC_PERIPH_PLL, 2); |
| 134 | static struct s32cc_clk periph_pll_vco_clk = |
| 135 | S32CC_FREQ_MODULE_CLK(periphpll, 1300 * MHZ, 2 * GHZ); |
| 136 | |
| 137 | static struct s32cc_pll_out_div periph_pll_phi3_div = |
| 138 | S32CC_PLL_OUT_DIV_INIT(periphpll, 3); |
| 139 | static struct s32cc_clk periph_pll_phi3_clk = |
| 140 | S32CC_FREQ_MODULE_CLK(periph_pll_phi3_div, 0, 133333333); |
| 141 | |
| 142 | static struct s32cc_clk *s32cc_hw_clk_list[22] = { |
Ghennadi Procopciuc | ecc98d2 | 2024-06-12 07:38:52 +0300 | [diff] [blame] | 143 | /* Oscillators */ |
| 144 | [S32CC_CLK_ID(S32CC_CLK_FIRC)] = &firc_clk, |
| 145 | [S32CC_CLK_ID(S32CC_CLK_SIRC)] = &sirc_clk, |
| 146 | [S32CC_CLK_ID(S32CC_CLK_FXOSC)] = &fxosc_clk, |
Ghennadi Procopciuc | 7277b97 | 2024-06-12 09:53:18 +0300 | [diff] [blame] | 147 | /* ARM PLL */ |
| 148 | [S32CC_CLK_ID(S32CC_CLK_ARM_PLL_PHI0)] = &arm_pll_phi0_clk, |
Ghennadi Procopciuc | 6494966 | 2024-08-05 16:49:51 +0300 | [diff] [blame] | 149 | /* ARM DFS */ |
| 150 | [S32CC_CLK_ID(S32CC_CLK_ARM_PLL_DFS1)] = &arm_dfs1_clk, |
Ghennadi Procopciuc | 22f9474 | 2024-08-06 11:48:11 +0300 | [diff] [blame] | 151 | /* PERIPH PLL */ |
| 152 | [S32CC_CLK_ID(S32CC_CLK_PERIPH_PLL_PHI3)] = &periph_pll_phi3_clk, |
Ghennadi Procopciuc | ecc98d2 | 2024-06-12 07:38:52 +0300 | [diff] [blame] | 153 | }; |
| 154 | |
| 155 | static struct s32cc_clk_array s32cc_hw_clocks = { |
| 156 | .type_mask = S32CC_CLK_TYPE(S32CC_CLK_FIRC), |
| 157 | .clks = &s32cc_hw_clk_list[0], |
| 158 | .n_clks = ARRAY_SIZE(s32cc_hw_clk_list), |
| 159 | }; |
| 160 | |
Ghennadi Procopciuc | 0609bcd | 2024-08-06 13:25:51 +0300 | [diff] [blame] | 161 | static struct s32cc_clk *s32cc_arch_clk_list[18] = { |
Ghennadi Procopciuc | 7277b97 | 2024-06-12 09:53:18 +0300 | [diff] [blame] | 162 | /* ARM PLL */ |
| 163 | [S32CC_CLK_ID(S32CC_CLK_ARM_PLL_MUX)] = &arm_pll_mux_clk, |
| 164 | [S32CC_CLK_ID(S32CC_CLK_ARM_PLL_VCO)] = &arm_pll_vco_clk, |
Ghennadi Procopciuc | 22f9474 | 2024-08-06 11:48:11 +0300 | [diff] [blame] | 165 | /* PERIPH PLL */ |
| 166 | [S32CC_CLK_ID(S32CC_CLK_PERIPH_PLL_MUX)] = &periph_pll_mux_clk, |
| 167 | [S32CC_CLK_ID(S32CC_CLK_PERIPH_PLL_VCO)] = &periph_pll_vco_clk, |
Ghennadi Procopciuc | 6494966 | 2024-08-05 16:49:51 +0300 | [diff] [blame] | 168 | /* MC_CGM0 */ |
| 169 | [S32CC_CLK_ID(S32CC_CLK_MC_CGM0_MUX0)] = &cgm0_mux0_clk, |
Ghennadi Procopciuc | 0609bcd | 2024-08-06 13:25:51 +0300 | [diff] [blame] | 170 | [S32CC_CLK_ID(S32CC_CLK_MC_CGM0_MUX8)] = &cgm0_mux8_clk, |
Ghennadi Procopciuc | 6494966 | 2024-08-05 16:49:51 +0300 | [diff] [blame] | 171 | /* XBAR */ |
| 172 | [S32CC_CLK_ID(S32CC_CLK_XBAR_2X)] = &xbar_2x_clk, |
| 173 | [S32CC_CLK_ID(S32CC_CLK_XBAR)] = &xbar_clk, |
| 174 | [S32CC_CLK_ID(S32CC_CLK_XBAR_DIV2)] = &xbar_div2_clk, |
| 175 | [S32CC_CLK_ID(S32CC_CLK_XBAR_DIV3)] = &xbar_div3_clk, |
| 176 | [S32CC_CLK_ID(S32CC_CLK_XBAR_DIV4)] = &xbar_div4_clk, |
| 177 | [S32CC_CLK_ID(S32CC_CLK_XBAR_DIV6)] = &xbar_div6_clk, |
Ghennadi Procopciuc | 8384d18 | 2024-06-12 10:53:06 +0300 | [diff] [blame] | 178 | /* MC_CGM1 */ |
| 179 | [S32CC_CLK_ID(S32CC_CLK_MC_CGM1_MUX0)] = &cgm1_mux0_clk, |
Ghennadi Procopciuc | 2be71a3 | 2024-06-12 12:06:36 +0300 | [diff] [blame] | 180 | /* A53 */ |
| 181 | [S32CC_CLK_ID(S32CC_CLK_A53_CORE)] = &a53_core_clk, |
| 182 | [S32CC_CLK_ID(S32CC_CLK_A53_CORE_DIV2)] = &a53_core_div2_clk, |
| 183 | [S32CC_CLK_ID(S32CC_CLK_A53_CORE_DIV10)] = &a53_core_div10_clk, |
Ghennadi Procopciuc | 0609bcd | 2024-08-06 13:25:51 +0300 | [diff] [blame] | 184 | /* Linflex */ |
| 185 | [S32CC_CLK_ID(S32CC_CLK_LINFLEX)] = &linflex_clk, |
| 186 | [S32CC_CLK_ID(S32CC_CLK_LINFLEX_BAUD)] = &linflex_baud_clk, |
Ghennadi Procopciuc | 7277b97 | 2024-06-12 09:53:18 +0300 | [diff] [blame] | 187 | }; |
| 188 | |
| 189 | static struct s32cc_clk_array s32cc_arch_clocks = { |
| 190 | .type_mask = S32CC_CLK_TYPE(S32CC_CLK_ARM_PLL_MUX), |
| 191 | .clks = &s32cc_arch_clk_list[0], |
| 192 | .n_clks = ARRAY_SIZE(s32cc_arch_clk_list), |
| 193 | }; |
| 194 | |
Ghennadi Procopciuc | 302831c | 2024-09-11 09:29:50 +0300 | [diff] [blame^] | 195 | static const struct s32cc_clk_array *s32cc_clk_table[2] = { |
| 196 | &s32cc_hw_clocks, |
| 197 | &s32cc_arch_clocks, |
| 198 | }; |
| 199 | |
Ghennadi Procopciuc | ecc98d2 | 2024-06-12 07:38:52 +0300 | [diff] [blame] | 200 | struct s32cc_clk *s32cc_get_arch_clk(unsigned long id) |
| 201 | { |
Ghennadi Procopciuc | 302831c | 2024-09-11 09:29:50 +0300 | [diff] [blame^] | 202 | return s32cc_get_clk_from_table(s32cc_clk_table, |
| 203 | ARRAY_SIZE(s32cc_clk_table), |
| 204 | id); |
| 205 | } |
Ghennadi Procopciuc | ecc98d2 | 2024-06-12 07:38:52 +0300 | [diff] [blame] | 206 | |
Ghennadi Procopciuc | 302831c | 2024-09-11 09:29:50 +0300 | [diff] [blame^] | 207 | int s32cc_get_clk_id(const struct s32cc_clk *clk, unsigned long *id) |
| 208 | { |
| 209 | return s32cc_get_id_from_table(s32cc_clk_table, |
| 210 | ARRAY_SIZE(s32cc_clk_table), |
| 211 | clk, id); |
Ghennadi Procopciuc | ecc98d2 | 2024-06-12 07:38:52 +0300 | [diff] [blame] | 212 | } |