Jimmy Brisson | 7cc90c4 | 2020-09-30 15:34:51 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019-2020, ARM Limited. All rights reserved. |
Varun Wadekar | 0914fc4 | 2021-07-27 02:32:29 -0700 | [diff] [blame] | 3 | * Copyright (c) 2021, NVIDIA Corporation. All rights reserved. |
Jimmy Brisson | 7cc90c4 | 2020-09-30 15:34:51 -0500 | [diff] [blame] | 4 | * |
| 5 | * SPDX-License-Identifier: BSD-3-Clause |
| 6 | */ |
| 7 | |
| 8 | #ifndef CORTEX_A78_AE_H |
| 9 | #define CORTEX_A78_AE_H |
| 10 | |
| 11 | #include <cortex_a78.h> |
| 12 | |
| 13 | #define CORTEX_A78_AE_MIDR U(0x410FD420) |
| 14 | |
Varun Wadekar | 0914fc4 | 2021-07-27 02:32:29 -0700 | [diff] [blame] | 15 | /******************************************************************************* |
| 16 | * CPU Extended Control register specific definitions. |
| 17 | ******************************************************************************/ |
| 18 | #define CORTEX_A78_AE_CPUECTLR_EL1 CORTEX_A78_CPUECTLR_EL1 |
| 19 | #define CORTEX_A78_AE_CPUECTLR_EL1_BIT_8 CORTEX_A78_CPUECTLR_EL1_BIT_8 |
| 20 | |
Jimmy Brisson | 7cc90c4 | 2020-09-30 15:34:51 -0500 | [diff] [blame] | 21 | #endif /* CORTEX_A78_AE_H */ |