| commit | 2f73d970b9f9d6dc4ab278d1296d4ec39232f8a9 | [log] [tgz] |
|---|---|---|
| author | Bipin Ravi <bipin.ravi@arm.com> | Thu Jan 20 00:01:04 2022 -0600 |
| committer | Bipin Ravi <bipin.ravi@arm.com> | Sun Feb 06 01:43:39 2022 -0600 |
| tree | f11db3abadf772e599448ad140589fb2fc6c5e2a | |
| parent | dd2eafaa7a49958dd05e002f18a51cbd3d871dd9 [diff] |
fix(errata): workaround for Cortex-X2 errata 2017096 Cortex-X2 erratum 2017096 is a Cat B erratum that applies to revisions r0p0, r1p0 & r2p0. The workaround is to set CPUECLTR_EL1[8] to 1 which disables store issue prefetching. SDEN can be found here: https://developer.arm.com/documentation/SDEN1775100 Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I3b740aedc95c2394f6b8d1186014d2b2f640ae05