blob: 0bcfeced39606fb35a5c78793d780bfbdadcef31 [file] [log] [blame]
Yann Gautier4b0c72a2018-07-16 10:54:09 +02001/*
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +01002 * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
Yann Gautier4b0c72a2018-07-16 10:54:09 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Yann Gautier4b0c72a2018-07-16 10:54:09 +02007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008#include <string.h>
9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <arch_helpers.h>
11#include <common/debug.h>
Yann Gautiera3bd8d12021-06-18 11:33:26 +020012#include <common/desc_image_load.h>
Sughosh Ganub721f8a2021-12-01 16:45:11 +053013#include <drivers/fwu/fwu.h>
14#include <drivers/fwu/fwu_metadata.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000015#include <drivers/io/io_block.h>
16#include <drivers/io/io_driver.h>
Lionel Debieve5adcd502022-10-05 16:51:12 +020017#include <drivers/io/io_encrypted.h>
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020018#include <drivers/io/io_fip.h>
Patrick Delaunay9c5ee782021-07-06 14:07:56 +020019#include <drivers/io/io_memmap.h>
Lionel Debieve402a46b2019-11-04 12:28:15 +010020#include <drivers/io/io_mtd.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000021#include <drivers/io/io_storage.h>
22#include <drivers/mmc.h>
Sughosh Ganub721f8a2021-12-01 16:45:11 +053023#include <drivers/partition/efi.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000024#include <drivers/partition/partition.h>
Lionel Debieve402a46b2019-11-04 12:28:15 +010025#include <drivers/raw_nand.h>
Lionel Debieve186b0462019-09-24 18:30:12 +020026#include <drivers/spi_nand.h>
Lionel Debievecb0dbc42019-09-25 09:11:31 +020027#include <drivers/spi_nor.h>
Lionel Debieve402a46b2019-11-04 12:28:15 +010028#include <drivers/st/stm32_fmc2_nand.h>
Lionel Debieve186b0462019-09-24 18:30:12 +020029#include <drivers/st/stm32_qspi.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000030#include <drivers/st/stm32_sdmmc2.h>
Patrick Delaunay9c5ee782021-07-06 14:07:56 +020031#include <drivers/usb_device.h>
Yann Gautier29f1f942021-07-13 18:07:41 +020032#include <lib/fconf/fconf.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000033#include <lib/mmio.h>
34#include <lib/utils.h>
35#include <plat/common/platform.h>
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020036#include <tools_share/firmware_image_package.h>
37
38#include <platform_def.h>
Patrick Delaunay9c5ee782021-07-06 14:07:56 +020039#include <stm32cubeprogrammer.h>
Lionel Debieve5e111c52022-02-24 18:58:46 +010040#include <stm32mp_efi.h>
Yann Gautier29f1f942021-07-13 18:07:41 +020041#include <stm32mp_fconf_getter.h>
Yann Gautier8636a5f2022-05-06 15:27:32 +020042#include <stm32mp_io_storage.h>
Patrick Delaunay9c5ee782021-07-06 14:07:56 +020043#include <usb_dfu.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000044
Yann Gautier4b0c72a2018-07-16 10:54:09 +020045/* IO devices */
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020046uintptr_t fip_dev_handle;
47uintptr_t storage_dev_handle;
Yann Gautier4b0c72a2018-07-16 10:54:09 +020048
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020049static const io_dev_connector_t *fip_dev_con;
Yann Gautier8244e1d2018-10-15 09:36:58 +020050
Lionel Debieve5adcd502022-10-05 16:51:12 +020051#ifndef DECRYPTION_SUPPORT_none
52static const io_dev_connector_t *enc_dev_con;
53uintptr_t enc_dev_handle;
54#endif
55
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +020056#if STM32MP_SDMMC || STM32MP_EMMC
Yann Gautierac22dd52021-03-22 14:22:14 +010057static struct mmc_device_info mmc_info;
Yann Gautier8244e1d2018-10-15 09:36:58 +020058
Yann Gautierf9af3bc2018-11-09 15:57:18 +010059static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE);
Yann Gautier8244e1d2018-10-15 09:36:58 +020060
Yann Gautiera3bd8d12021-06-18 11:33:26 +020061static io_block_dev_spec_t mmc_block_dev_spec = {
Yann Gautier8244e1d2018-10-15 09:36:58 +020062 /* It's used as temp buffer in block driver */
63 .buffer = {
64 .offset = (size_t)&block_buffer,
65 .length = MMC_BLOCK_SIZE,
66 },
67 .ops = {
68 .read = mmc_read_blocks,
69 .write = NULL,
70 },
71 .block_size = MMC_BLOCK_SIZE,
72};
Vyacheslav Yurkove43a0802021-06-04 10:10:51 +020073
Yann Gautier8244e1d2018-10-15 09:36:58 +020074static const io_dev_connector_t *mmc_dev_con;
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +020075#endif /* STM32MP_SDMMC || STM32MP_EMMC */
Yann Gautier8244e1d2018-10-15 09:36:58 +020076
Lionel Debievecb0dbc42019-09-25 09:11:31 +020077#if STM32MP_SPI_NOR
78static io_mtd_dev_spec_t spi_nor_dev_spec = {
79 .ops = {
80 .init = spi_nor_init,
81 .read = spi_nor_read,
82 },
83};
84#endif
85
Lionel Debieve402a46b2019-11-04 12:28:15 +010086#if STM32MP_RAW_NAND
87static io_mtd_dev_spec_t nand_dev_spec = {
88 .ops = {
89 .init = nand_raw_init,
90 .read = nand_read,
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020091 .seek = nand_seek_bb
Lionel Debieve402a46b2019-11-04 12:28:15 +010092 },
93};
94
95static const io_dev_connector_t *nand_dev_con;
96#endif
97
Lionel Debieve186b0462019-09-24 18:30:12 +020098#if STM32MP_SPI_NAND
99static io_mtd_dev_spec_t spi_nand_dev_spec = {
100 .ops = {
101 .init = spi_nand_init,
102 .read = nand_read,
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200103 .seek = nand_seek_bb
Lionel Debieve186b0462019-09-24 18:30:12 +0200104 },
105};
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200106#endif
Lionel Debieve186b0462019-09-24 18:30:12 +0200107
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200108#if STM32MP_SPI_NAND || STM32MP_SPI_NOR
Lionel Debieve186b0462019-09-24 18:30:12 +0200109static const io_dev_connector_t *spi_dev_con;
110#endif
111
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200112#if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200113static const io_dev_connector_t *memmap_dev_con;
114#endif
115
Yann Gautier29f1f942021-07-13 18:07:41 +0200116io_block_spec_t image_block_spec = {
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200117 .offset = 0U,
118 .length = 0U,
119};
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200120
Yann Gautier29f1f942021-07-13 18:07:41 +0200121int open_fip(const uintptr_t spec)
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200122{
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200123 return io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID);
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200124}
Yann Gautier8244e1d2018-10-15 09:36:58 +0200125
Lionel Debieve5adcd502022-10-05 16:51:12 +0200126#ifndef DECRYPTION_SUPPORT_none
127int open_enc_fip(const uintptr_t spec)
128{
129 int result;
130 uintptr_t local_image_handle;
131
132 result = io_dev_init(enc_dev_handle, (uintptr_t)ENC_IMAGE_ID);
133 if (result != 0) {
134 return result;
135 }
136
137 result = io_open(enc_dev_handle, spec, &local_image_handle);
138 if (result != 0) {
139 return result;
140 }
141
142 VERBOSE("Using encrypted FIP\n");
143 io_close(local_image_handle);
144
145 return 0;
146}
147#endif
148
Yann Gautier29f1f942021-07-13 18:07:41 +0200149int open_storage(const uintptr_t spec)
Yann Gautier8244e1d2018-10-15 09:36:58 +0200150{
151 return io_dev_init(storage_dev_handle, 0);
152}
Vyacheslav Yurkove43a0802021-06-04 10:10:51 +0200153
Ahmad Fatoumbd685282022-05-19 07:42:33 +0200154#if STM32MP_EMMC_BOOT
155static uint32_t get_boot_part_fip_header(void)
156{
157 io_block_spec_t emmc_boot_fip_block_spec = {
158 .offset = STM32MP_EMMC_BOOT_FIP_OFFSET,
159 .length = MMC_BLOCK_SIZE, /* We are interested only in first 4 bytes */
160 };
161 uint32_t magic = 0U;
162 int io_result;
163 size_t bytes_read;
164 uintptr_t fip_hdr_handle;
165
166 io_result = io_open(storage_dev_handle, (uintptr_t)&emmc_boot_fip_block_spec,
167 &fip_hdr_handle);
168 assert(io_result == 0);
169
170 io_result = io_read(fip_hdr_handle, (uintptr_t)&magic, sizeof(magic),
171 &bytes_read);
172 if ((io_result != 0) || (bytes_read != sizeof(magic))) {
173 panic();
174 }
175
176 io_close(fip_hdr_handle);
177
178 VERBOSE("%s: eMMC boot magic at offset 256K: %08x\n",
179 __func__, magic);
180
181 return magic;
182}
183#endif
184
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200185static void print_boot_device(boot_api_context_t *boot_context)
186{
187 switch (boot_context->boot_interface_selected) {
188 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
189 INFO("Using SDMMC\n");
190 break;
191 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
192 INFO("Using EMMC\n");
193 break;
Yann Gautiercdb0ec92020-08-31 15:00:19 +0200194 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
195 INFO("Using SPI NOR\n");
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200196 break;
Lionel Debieve402a46b2019-11-04 12:28:15 +0100197 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
198 INFO("Using FMC NAND\n");
199 break;
Yann Gautiercdb0ec92020-08-31 15:00:19 +0200200 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_SPI:
Lionel Debieve186b0462019-09-24 18:30:12 +0200201 INFO("Using SPI NAND\n");
202 break;
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200203 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
204 INFO("Using UART\n");
205 break;
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200206 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
207 INFO("Using USB\n");
208 break;
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200209 default:
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200210 ERROR("Boot interface %u not found\n",
211 boot_context->boot_interface_selected);
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200212 panic();
213 break;
214 }
215
216 if (boot_context->boot_interface_instance != 0U) {
217 INFO(" Instance %d\n", boot_context->boot_interface_instance);
218 }
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200219}
220
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200221#if STM32MP_SDMMC || STM32MP_EMMC
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200222static void boot_mmc(enum mmc_device_type mmc_dev_type,
223 uint16_t boot_interface_instance)
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200224{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100225 int io_result __maybe_unused;
Yann Gautier8244e1d2018-10-15 09:36:58 +0200226 struct stm32_sdmmc2_params params;
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200227
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200228 zeromem(&params, sizeof(struct stm32_sdmmc2_params));
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200229
Yann Gautierac22dd52021-03-22 14:22:14 +0100230 mmc_info.mmc_dev_type = mmc_dev_type;
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200231
232 switch (boot_interface_instance) {
233 case 1:
234 params.reg_base = STM32MP_SDMMC1_BASE;
235 break;
236 case 2:
237 params.reg_base = STM32MP_SDMMC2_BASE;
238 break;
239 case 3:
240 params.reg_base = STM32MP_SDMMC3_BASE;
241 break;
242 default:
243 WARN("SDMMC instance not found, using default\n");
244 if (mmc_dev_type == MMC_IS_SD) {
245 params.reg_base = STM32MP_SDMMC1_BASE;
246 } else {
247 params.reg_base = STM32MP_SDMMC2_BASE;
248 }
249 break;
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200250 }
251
Yann Gautierb218faa2019-08-14 16:44:48 +0200252 if (mmc_dev_type != MMC_IS_EMMC) {
253 params.flags = MMC_FLAG_SD_CMD6;
254 }
255
Yann Gautierac22dd52021-03-22 14:22:14 +0100256 params.device_info = &mmc_info;
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200257 if (stm32_sdmmc2_mmc_init(&params) != 0) {
258 ERROR("SDMMC%u init failed\n", boot_interface_instance);
259 panic();
260 }
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200261
Ahmad Fatoumbd685282022-05-19 07:42:33 +0200262 /* Open MMC as a block device to read FIP */
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200263 io_result = register_io_dev_block(&mmc_dev_con);
264 if (io_result != 0) {
265 panic();
266 }
Yann Gautier8244e1d2018-10-15 09:36:58 +0200267
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200268 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec,
269 &storage_dev_handle);
270 assert(io_result == 0);
Ahmad Fatoumbd685282022-05-19 07:42:33 +0200271
272#if STM32MP_EMMC_BOOT
273 if (mmc_dev_type == MMC_IS_EMMC) {
274 io_result = mmc_part_switch_current_boot();
275 assert(io_result == 0);
276
277 if (get_boot_part_fip_header() != TOC_HEADER_NAME) {
278 WARN("%s: Can't find FIP header on eMMC boot partition. Trying GPT\n",
279 __func__);
280 io_result = mmc_part_switch_user();
281 assert(io_result == 0);
282 return;
283 }
284
285 VERBOSE("%s: FIP header found on eMMC boot partition\n",
286 __func__);
287 image_block_spec.offset = STM32MP_EMMC_BOOT_FIP_OFFSET;
Yann Gautier637cd9e2022-09-02 08:36:40 +0200288 image_block_spec.length = mmc_boot_part_size() - STM32MP_EMMC_BOOT_FIP_OFFSET;
Ahmad Fatoumbd685282022-05-19 07:42:33 +0200289 }
290#endif
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200291}
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200292#endif /* STM32MP_SDMMC || STM32MP_EMMC */
Yann Gautier8244e1d2018-10-15 09:36:58 +0200293
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200294#if STM32MP_SPI_NOR
295static void boot_spi_nor(boot_api_context_t *boot_context)
296{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100297 int io_result __maybe_unused;
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200298
299 io_result = stm32_qspi_init();
300 assert(io_result == 0);
301
302 io_result = register_io_dev_mtd(&spi_dev_con);
303 assert(io_result == 0);
304
305 /* Open connections to device */
306 io_result = io_dev_open(spi_dev_con,
307 (uintptr_t)&spi_nor_dev_spec,
308 &storage_dev_handle);
309 assert(io_result == 0);
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200310}
311#endif /* STM32MP_SPI_NOR */
312
Lionel Debieve402a46b2019-11-04 12:28:15 +0100313#if STM32MP_RAW_NAND
314static void boot_fmc2_nand(boot_api_context_t *boot_context)
315{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100316 int io_result __maybe_unused;
Lionel Debieve402a46b2019-11-04 12:28:15 +0100317
318 io_result = stm32_fmc2_init();
319 assert(io_result == 0);
320
321 /* Register the IO device on this platform */
322 io_result = register_io_dev_mtd(&nand_dev_con);
323 assert(io_result == 0);
324
325 /* Open connections to device */
326 io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec,
327 &storage_dev_handle);
328 assert(io_result == 0);
Lionel Debieve402a46b2019-11-04 12:28:15 +0100329}
330#endif /* STM32MP_RAW_NAND */
331
Lionel Debieve186b0462019-09-24 18:30:12 +0200332#if STM32MP_SPI_NAND
333static void boot_spi_nand(boot_api_context_t *boot_context)
334{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100335 int io_result __maybe_unused;
Lionel Debieve186b0462019-09-24 18:30:12 +0200336
337 io_result = stm32_qspi_init();
338 assert(io_result == 0);
339
340 io_result = register_io_dev_mtd(&spi_dev_con);
341 assert(io_result == 0);
342
343 /* Open connections to device */
344 io_result = io_dev_open(spi_dev_con,
345 (uintptr_t)&spi_nand_dev_spec,
346 &storage_dev_handle);
347 assert(io_result == 0);
Lionel Debieve186b0462019-09-24 18:30:12 +0200348}
349#endif /* STM32MP_SPI_NAND */
350
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200351#if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200352static void mmap_io_setup(void)
353{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100354 int io_result __maybe_unused;
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200355
356 io_result = register_io_dev_memmap(&memmap_dev_con);
357 assert(io_result == 0);
358
359 io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL,
360 &storage_dev_handle);
361 assert(io_result == 0);
362}
363
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200364#if STM32MP_UART_PROGRAMMER
365static void stm32cubeprogrammer_uart(void)
366{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100367 int ret __maybe_unused;
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200368 boot_api_context_t *boot_context =
369 (boot_api_context_t *)stm32mp_get_boot_ctx_address();
370 uintptr_t uart_base;
371
372 uart_base = get_uart_address(boot_context->boot_interface_instance);
373 ret = stm32cubeprog_uart_load(uart_base, DWL_BUFFER_BASE, DWL_BUFFER_SIZE);
374 assert(ret == 0);
375}
376#endif
377
378#if STM32MP_USB_PROGRAMMER
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200379static void stm32cubeprogrammer_usb(void)
380{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100381 int ret __maybe_unused;
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200382 struct usb_handle *pdev;
383
384 /* Init USB on platform */
385 pdev = usb_dfu_plat_init();
386
387 ret = stm32cubeprog_usb_load(pdev, DWL_BUFFER_BASE, DWL_BUFFER_SIZE);
388 assert(ret == 0);
389}
390#endif
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200391#endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */
392
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200393void stm32mp_io_setup(void)
394{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100395 int io_result __maybe_unused;
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200396 boot_api_context_t *boot_context =
397 (boot_api_context_t *)stm32mp_get_boot_ctx_address();
Yann Gautierf9d40d52019-01-17 14:41:46 +0100398
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200399 print_boot_device(boot_context);
Yann Gautier8244e1d2018-10-15 09:36:58 +0200400
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200401 if ((boot_context->boot_partition_used_toboot == 1U) ||
402 (boot_context->boot_partition_used_toboot == 2U)) {
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200403 INFO("Boot used partition fsbl%u\n",
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200404 boot_context->boot_partition_used_toboot);
405 }
Yann Gautier8244e1d2018-10-15 09:36:58 +0200406
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200407 io_result = register_io_dev_fip(&fip_dev_con);
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200408 assert(io_result == 0);
Yann Gautier8244e1d2018-10-15 09:36:58 +0200409
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200410 io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL,
411 &fip_dev_handle);
Yann Gautier8244e1d2018-10-15 09:36:58 +0200412
Lionel Debieve5adcd502022-10-05 16:51:12 +0200413#ifndef DECRYPTION_SUPPORT_none
414 io_result = register_io_dev_enc(&enc_dev_con);
415 assert(io_result == 0);
416
417 io_result = io_dev_open(enc_dev_con, (uintptr_t)NULL,
418 &enc_dev_handle);
419 assert(io_result == 0);
420#endif
421
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200422 switch (boot_context->boot_interface_selected) {
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200423#if STM32MP_SDMMC
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200424 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
425 dmbsy();
426 boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
427 break;
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200428#endif
429#if STM32MP_EMMC
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200430 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
431 dmbsy();
432 boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
Yann Gautier8244e1d2018-10-15 09:36:58 +0200433 break;
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200434#endif
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200435#if STM32MP_SPI_NOR
Yann Gautiercdb0ec92020-08-31 15:00:19 +0200436 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200437 dmbsy();
438 boot_spi_nor(boot_context);
439 break;
440#endif
Lionel Debieve402a46b2019-11-04 12:28:15 +0100441#if STM32MP_RAW_NAND
442 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
443 dmbsy();
444 boot_fmc2_nand(boot_context);
445 break;
446#endif
Lionel Debieve186b0462019-09-24 18:30:12 +0200447#if STM32MP_SPI_NAND
Yann Gautiercdb0ec92020-08-31 15:00:19 +0200448 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_SPI:
Lionel Debieve186b0462019-09-24 18:30:12 +0200449 dmbsy();
450 boot_spi_nand(boot_context);
451 break;
452#endif
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200453#if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
454#if STM32MP_UART_PROGRAMMER
455 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
456#endif
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200457#if STM32MP_USB_PROGRAMMER
458 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200459#endif
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200460 dmbsy();
461 mmap_io_setup();
462 break;
463#endif
Yann Gautier8244e1d2018-10-15 09:36:58 +0200464
465 default:
466 ERROR("Boot interface %d not supported\n",
467 boot_context->boot_interface_selected);
Yann Gautier4c2b73d2021-06-30 17:04:22 +0200468 panic();
Yann Gautier8244e1d2018-10-15 09:36:58 +0200469 break;
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200470 }
471}
472
473int bl2_plat_handle_pre_image_load(unsigned int image_id)
474{
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100475 static bool gpt_init_done __maybe_unused;
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200476 uint16_t boot_itf = stm32mp_get_boot_itf_selected();
477
478 switch (boot_itf) {
479#if STM32MP_SDMMC || STM32MP_EMMC
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200480 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
Ahmad Fatoumbd685282022-05-19 07:42:33 +0200481#if STM32MP_EMMC_BOOT
482 if (image_block_spec.offset == STM32MP_EMMC_BOOT_FIP_OFFSET) {
483 break;
484 }
485#endif
486 /* fallthrough */
487 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200488 if (!gpt_init_done) {
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530489/*
490 * With FWU Multi Bank feature enabled, the selection of
491 * the image to boot will be done by fwu_init calling the
492 * platform hook, plat_fwu_set_images_source.
493 */
494#if !PSA_FWU_SUPPORT
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200495 const partition_entry_t *entry;
Lionel Debieve5e111c52022-02-24 18:58:46 +0100496 const struct efi_guid img_type_guid = STM32MP_FIP_GUID;
497 uuid_t img_type_uuid;
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200498
Lionel Debieve5e111c52022-02-24 18:58:46 +0100499 guidcpy(&img_type_uuid, &img_type_guid);
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200500 partition_init(GPT_IMAGE_ID);
Lionel Debieve5e111c52022-02-24 18:58:46 +0100501 entry = get_partition_entry_by_type(&img_type_uuid);
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200502 if (entry == NULL) {
Lionel Debieve5e111c52022-02-24 18:58:46 +0100503 entry = get_partition_entry(FIP_IMAGE_NAME);
504 if (entry == NULL) {
505 ERROR("Could NOT find the %s partition!\n",
506 FIP_IMAGE_NAME);
507
508 return -ENOENT;
509 }
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200510 }
511
512 image_block_spec.offset = entry->start;
513 image_block_spec.length = entry->length;
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530514#endif
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200515 gpt_init_done = true;
Yann Gautiera3bd8d12021-06-18 11:33:26 +0200516 } else {
517 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100518
Yann Gautierc6f77b02022-05-06 09:50:43 +0200519 assert(bl_mem_params != NULL);
Yann Gautiera3bd8d12021-06-18 11:33:26 +0200520
521 mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base;
522 mmc_block_dev_spec.buffer.length = bl_mem_params->image_info.image_max_size;
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200523 }
524
525 break;
526#endif
527
528#if STM32MP_RAW_NAND || STM32MP_SPI_NAND
529#if STM32MP_RAW_NAND
530 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
531#endif
532#if STM32MP_SPI_NAND
Yann Gautiercdb0ec92020-08-31 15:00:19 +0200533 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_SPI:
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200534#endif
535 image_block_spec.offset = STM32MP_NAND_FIP_OFFSET;
536 break;
537#endif
538
539#if STM32MP_SPI_NOR
Yann Gautiercdb0ec92020-08-31 15:00:19 +0200540 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100541/*
542 * With FWU Multi Bank feature enabled, the selection of
543 * the image to boot will be done by fwu_init calling the
544 * platform hook, plat_fwu_set_images_source.
545 */
546#if !PSA_FWU_SUPPORT
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200547 image_block_spec.offset = STM32MP_NOR_FIP_OFFSET;
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100548#endif
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200549 break;
550#endif
551
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200552#if STM32MP_UART_PROGRAMMER
553 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
554 if (image_id == FW_CONFIG_ID) {
555 stm32cubeprogrammer_uart();
556 /* FIP loaded at DWL address */
557 image_block_spec.offset = DWL_BUFFER_BASE;
558 image_block_spec.length = DWL_BUFFER_SIZE;
559 }
560 break;
561#endif
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200562#if STM32MP_USB_PROGRAMMER
563 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
564 if (image_id == FW_CONFIG_ID) {
565 stm32cubeprogrammer_usb();
566 /* FIP loaded at DWL address */
567 image_block_spec.offset = DWL_BUFFER_BASE;
568 image_block_spec.length = DWL_BUFFER_SIZE;
569 }
570 break;
571#endif
572
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200573 default:
574 ERROR("FIP Not found\n");
575 panic();
Yann Gautier8244e1d2018-10-15 09:36:58 +0200576 }
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200577
578 return 0;
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200579}
580
581/*
582 * Return an IO device handle and specification which can be used to access
583 * an image. Use this to enforce platform load policy.
584 */
585int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
586 uintptr_t *image_spec)
587{
588 int rc;
589 const struct plat_io_policy *policy;
590
Yann Gautier29f1f942021-07-13 18:07:41 +0200591 policy = FCONF_GET_PROPERTY(stm32mp, io_policies, image_id);
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200592 rc = policy->check(policy->image_spec);
593 if (rc == 0) {
594 *image_spec = policy->image_spec;
595 *dev_handle = *(policy->dev_handle);
596 }
597
598 return rc;
599}
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530600
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100601#if (STM32MP_SDMMC || STM32MP_EMMC || STM32MP_SPI_NOR) && PSA_FWU_SUPPORT
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530602/*
Nicolas Toromanoff5a937cd2022-02-07 10:12:04 +0100603 * In each boot in non-trial mode, we set the BKP register to
604 * FWU_MAX_TRIAL_REBOOT, and return the active_index from metadata.
605 *
606 * As long as the update agent didn't update the "accepted" field in metadata
607 * (i.e. we are in trial mode), we select the new active_index.
608 * To avoid infinite boot loop at trial boot we decrement a BKP register.
609 * If this counter is 0:
610 * - an unexpected TAMPER event raised (that resets the BKP registers to 0)
611 * - a power-off occurs before the update agent was able to update the
612 * "accepted' field
613 * - we already boot FWU_MAX_TRIAL_REBOOT times in trial mode.
614 * we select the previous_active_index.
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530615 */
Yann Gautier5cda3aa2022-11-18 13:43:48 +0100616#define INVALID_BOOT_IDX 0xFFFFFFFFU
Nicolas Toromanoff5a937cd2022-02-07 10:12:04 +0100617
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530618uint32_t plat_fwu_get_boot_idx(void)
619{
Nicolas Toromanoff5a937cd2022-02-07 10:12:04 +0100620 /*
621 * Select boot index and update boot counter only once per boot
622 * even if this function is called several times.
623 */
624 static uint32_t boot_idx = INVALID_BOOT_IDX;
625 const struct fwu_metadata *data;
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530626
Nicolas Toromanoff5a937cd2022-02-07 10:12:04 +0100627 data = fwu_get_metadata();
628
629 if (boot_idx == INVALID_BOOT_IDX) {
630 boot_idx = data->active_index;
631 if (fwu_is_trial_run_state()) {
632 if (stm32_get_and_dec_fwu_trial_boot_cnt() == 0U) {
633 WARN("Trial FWU fails %u times\n",
634 FWU_MAX_TRIAL_REBOOT);
635 boot_idx = data->previous_active_index;
636 }
637 } else {
638 stm32_set_max_fwu_trial_boot_cnt();
639 }
640 }
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530641
Nicolas Toromanoff5a937cd2022-02-07 10:12:04 +0100642 return boot_idx;
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530643}
644
645static void *stm32_get_image_spec(const uuid_t *img_type_uuid)
646{
647 unsigned int i;
648
649 for (i = 0U; i < MAX_NUMBER_IDS; i++) {
650 if ((guidcmp(&policies[i].img_type_guid, img_type_uuid)) == 0) {
651 return (void *)policies[i].image_spec;
652 }
653 }
654
655 return NULL;
656}
657
658void plat_fwu_set_images_source(const struct fwu_metadata *metadata)
659{
660 unsigned int i;
661 uint32_t boot_idx;
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100662 const partition_entry_t *entry __maybe_unused;
663 const uuid_t *img_type_uuid;
664 const uuid_t *img_uuid __maybe_unused;
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530665 io_block_spec_t *image_spec;
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100666 const uint16_t boot_itf = stm32mp_get_boot_itf_selected();
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530667
668 boot_idx = plat_fwu_get_boot_idx();
669 assert(boot_idx < NR_OF_FW_BANKS);
670
671 for (i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
672 img_type_uuid = &metadata->img_entry[i].img_type_uuid;
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100673
674 img_uuid = &metadata->img_entry[i].img_props[boot_idx].img_uuid;
675
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530676 image_spec = stm32_get_image_spec(img_type_uuid);
677 if (image_spec == NULL) {
678 ERROR("Unable to get image spec for the image in the metadata\n");
679 panic();
680 }
681
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100682 switch (boot_itf) {
683#if (STM32MP_SDMMC || STM32MP_EMMC)
684 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
685 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
686 entry = get_partition_entry_by_uuid(img_uuid);
687 if (entry == NULL) {
688 ERROR("No partition with the uuid mentioned in metadata\n");
689 panic();
690 }
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530691
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100692 image_spec->offset = entry->start;
693 image_spec->length = entry->length;
694 break;
695#endif
696#if STM32MP_SPI_NOR
Yann Gautiercdb0ec92020-08-31 15:00:19 +0200697 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100698 if (guidcmp(img_uuid, &STM32MP_NOR_FIP_A_GUID) == 0) {
699 image_spec->offset = STM32MP_NOR_FIP_A_OFFSET;
700 } else if (guidcmp(img_uuid, &STM32MP_NOR_FIP_B_GUID) == 0) {
701 image_spec->offset = STM32MP_NOR_FIP_B_OFFSET;
702 } else {
703 ERROR("Invalid uuid mentioned in metadata\n");
704 panic();
705 }
706 break;
707#endif
708 default:
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530709 panic();
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100710 break;
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530711 }
Sughosh Ganub721f8a2021-12-01 16:45:11 +0530712 }
713}
Sughosh Ganud1f87132021-12-01 16:46:34 +0530714
715static int plat_set_image_source(unsigned int image_id,
716 uintptr_t *handle,
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100717 uintptr_t *image_spec)
Sughosh Ganud1f87132021-12-01 16:46:34 +0530718{
719 struct plat_io_policy *policy;
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100720 io_block_spec_t *spec __maybe_unused;
721 const partition_entry_t *entry __maybe_unused;
722 const uint16_t boot_itf = stm32mp_get_boot_itf_selected();
Sughosh Ganud1f87132021-12-01 16:46:34 +0530723
724 policy = &policies[image_id];
Sughosh Ganud1f87132021-12-01 16:46:34 +0530725 spec = (io_block_spec_t *)policy->image_spec;
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100726
727 switch (boot_itf) {
728#if (STM32MP_SDMMC || STM32MP_EMMC)
729 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
730 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
731 partition_init(GPT_IMAGE_ID);
732
733 if (image_id == FWU_METADATA_IMAGE_ID) {
734 entry = get_partition_entry(METADATA_PART_1);
735 } else {
736 entry = get_partition_entry(METADATA_PART_2);
737 }
738
739 if (entry == NULL) {
740 ERROR("Unable to find a metadata partition\n");
741 return -ENOENT;
742 }
743
744 spec->offset = entry->start;
745 spec->length = entry->length;
746 break;
747#endif
748
749#if STM32MP_SPI_NOR
Yann Gautiercdb0ec92020-08-31 15:00:19 +0200750 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100751 if (image_id == FWU_METADATA_IMAGE_ID) {
752 spec->offset = STM32MP_NOR_METADATA1_OFFSET;
753 } else {
754 spec->offset = STM32MP_NOR_METADATA2_OFFSET;
755 }
756
757 spec->length = sizeof(struct fwu_metadata);
758 break;
759#endif
760 default:
761 panic();
762 break;
763 }
Sughosh Ganud1f87132021-12-01 16:46:34 +0530764
765 *image_spec = policy->image_spec;
766 *handle = *policy->dev_handle;
767
768 return 0;
769}
770
771int plat_fwu_set_metadata_image_source(unsigned int image_id,
772 uintptr_t *handle,
773 uintptr_t *image_spec)
774{
Sughosh Ganud1f87132021-12-01 16:46:34 +0530775 assert((image_id == FWU_METADATA_IMAGE_ID) ||
776 (image_id == BKUP_FWU_METADATA_IMAGE_ID));
777
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100778 return plat_set_image_source(image_id, handle, image_spec);
Sughosh Ganud1f87132021-12-01 16:46:34 +0530779}
Nicolas Toromanoff44adc4f2022-02-07 10:12:29 +0100780#endif /* (STM32MP_SDMMC || STM32MP_EMMC || STM32MP_SPI_NOR) && PSA_FWU_SUPPORT */