blob: b0314d2ab0b86ef274a7715438fcfbe63502fcbc [file] [log] [blame]
Yann Gautier4b0c72a2018-07-16 10:54:09 +02001/*
Yann Gautierac22dd52021-03-22 14:22:14 +01002 * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
Yann Gautier4b0c72a2018-07-16 10:54:09 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Yann Gautier4b0c72a2018-07-16 10:54:09 +02007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008#include <string.h>
9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <arch_helpers.h>
11#include <common/debug.h>
Yann Gautiera3bd8d12021-06-18 11:33:26 +020012#include <common/desc_image_load.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000013#include <drivers/io/io_block.h>
14#include <drivers/io/io_driver.h>
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020015#include <drivers/io/io_fip.h>
Patrick Delaunay9c5ee782021-07-06 14:07:56 +020016#include <drivers/io/io_memmap.h>
Lionel Debieve402a46b2019-11-04 12:28:15 +010017#include <drivers/io/io_mtd.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000018#include <drivers/io/io_storage.h>
19#include <drivers/mmc.h>
20#include <drivers/partition/partition.h>
Lionel Debieve402a46b2019-11-04 12:28:15 +010021#include <drivers/raw_nand.h>
Lionel Debieve186b0462019-09-24 18:30:12 +020022#include <drivers/spi_nand.h>
Lionel Debievecb0dbc42019-09-25 09:11:31 +020023#include <drivers/spi_nor.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000024#include <drivers/st/io_mmc.h>
Lionel Debieve402a46b2019-11-04 12:28:15 +010025#include <drivers/st/stm32_fmc2_nand.h>
Lionel Debieve186b0462019-09-24 18:30:12 +020026#include <drivers/st/stm32_qspi.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000027#include <drivers/st/stm32_sdmmc2.h>
Patrick Delaunay9c5ee782021-07-06 14:07:56 +020028#include <drivers/usb_device.h>
Yann Gautier29f1f942021-07-13 18:07:41 +020029#include <lib/fconf/fconf.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000030#include <lib/mmio.h>
31#include <lib/utils.h>
32#include <plat/common/platform.h>
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020033#include <tools_share/firmware_image_package.h>
34
35#include <platform_def.h>
Patrick Delaunay9c5ee782021-07-06 14:07:56 +020036#include <stm32cubeprogrammer.h>
Yann Gautier29f1f942021-07-13 18:07:41 +020037#include <stm32mp_fconf_getter.h>
Patrick Delaunay9c5ee782021-07-06 14:07:56 +020038#include <usb_dfu.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000039
Yann Gautier4b0c72a2018-07-16 10:54:09 +020040/* IO devices */
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020041uintptr_t fip_dev_handle;
42uintptr_t storage_dev_handle;
Yann Gautier4b0c72a2018-07-16 10:54:09 +020043
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020044static const io_dev_connector_t *fip_dev_con;
Yann Gautier8244e1d2018-10-15 09:36:58 +020045
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +020046#if STM32MP_SDMMC || STM32MP_EMMC
Yann Gautierac22dd52021-03-22 14:22:14 +010047static struct mmc_device_info mmc_info;
Yann Gautier8244e1d2018-10-15 09:36:58 +020048
Yann Gautierf9af3bc2018-11-09 15:57:18 +010049static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE);
Yann Gautier8244e1d2018-10-15 09:36:58 +020050
Yann Gautiera3bd8d12021-06-18 11:33:26 +020051static io_block_dev_spec_t mmc_block_dev_spec = {
Yann Gautier8244e1d2018-10-15 09:36:58 +020052 /* It's used as temp buffer in block driver */
53 .buffer = {
54 .offset = (size_t)&block_buffer,
55 .length = MMC_BLOCK_SIZE,
56 },
57 .ops = {
58 .read = mmc_read_blocks,
59 .write = NULL,
60 },
61 .block_size = MMC_BLOCK_SIZE,
62};
Vyacheslav Yurkove43a0802021-06-04 10:10:51 +020063
Yann Gautier8244e1d2018-10-15 09:36:58 +020064static const io_dev_connector_t *mmc_dev_con;
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +020065#endif /* STM32MP_SDMMC || STM32MP_EMMC */
Yann Gautier8244e1d2018-10-15 09:36:58 +020066
Lionel Debievecb0dbc42019-09-25 09:11:31 +020067#if STM32MP_SPI_NOR
68static io_mtd_dev_spec_t spi_nor_dev_spec = {
69 .ops = {
70 .init = spi_nor_init,
71 .read = spi_nor_read,
72 },
73};
74#endif
75
Lionel Debieve402a46b2019-11-04 12:28:15 +010076#if STM32MP_RAW_NAND
77static io_mtd_dev_spec_t nand_dev_spec = {
78 .ops = {
79 .init = nand_raw_init,
80 .read = nand_read,
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020081 .seek = nand_seek_bb
Lionel Debieve402a46b2019-11-04 12:28:15 +010082 },
83};
84
85static const io_dev_connector_t *nand_dev_con;
86#endif
87
Lionel Debieve186b0462019-09-24 18:30:12 +020088#if STM32MP_SPI_NAND
89static io_mtd_dev_spec_t spi_nand_dev_spec = {
90 .ops = {
91 .init = spi_nand_init,
92 .read = nand_read,
Yann Gautier0ed7b2a2021-05-19 18:48:16 +020093 .seek = nand_seek_bb
Lionel Debieve186b0462019-09-24 18:30:12 +020094 },
95};
Lionel Debievecb0dbc42019-09-25 09:11:31 +020096#endif
Lionel Debieve186b0462019-09-24 18:30:12 +020097
Lionel Debievecb0dbc42019-09-25 09:11:31 +020098#if STM32MP_SPI_NAND || STM32MP_SPI_NOR
Lionel Debieve186b0462019-09-24 18:30:12 +020099static const io_dev_connector_t *spi_dev_con;
100#endif
101
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200102#if STM32MP_USB_PROGRAMMER
103static const io_dev_connector_t *memmap_dev_con;
104#endif
105
Yann Gautier29f1f942021-07-13 18:07:41 +0200106io_block_spec_t image_block_spec = {
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200107 .offset = 0U,
108 .length = 0U,
109};
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200110
Yann Gautier29f1f942021-07-13 18:07:41 +0200111int open_fip(const uintptr_t spec)
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200112{
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200113 return io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID);
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200114}
Yann Gautier8244e1d2018-10-15 09:36:58 +0200115
Yann Gautier29f1f942021-07-13 18:07:41 +0200116int open_storage(const uintptr_t spec)
Yann Gautier8244e1d2018-10-15 09:36:58 +0200117{
118 return io_dev_init(storage_dev_handle, 0);
119}
Vyacheslav Yurkove43a0802021-06-04 10:10:51 +0200120
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200121static void print_boot_device(boot_api_context_t *boot_context)
122{
123 switch (boot_context->boot_interface_selected) {
124 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
125 INFO("Using SDMMC\n");
126 break;
127 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
128 INFO("Using EMMC\n");
129 break;
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200130 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
131 INFO("Using QSPI NOR\n");
132 break;
Lionel Debieve402a46b2019-11-04 12:28:15 +0100133 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
134 INFO("Using FMC NAND\n");
135 break;
Lionel Debieve186b0462019-09-24 18:30:12 +0200136 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
137 INFO("Using SPI NAND\n");
138 break;
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200139 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
140 INFO("Using USB\n");
141 break;
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200142 default:
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200143 ERROR("Boot interface %u not found\n",
144 boot_context->boot_interface_selected);
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200145 panic();
146 break;
147 }
148
149 if (boot_context->boot_interface_instance != 0U) {
150 INFO(" Instance %d\n", boot_context->boot_interface_instance);
151 }
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200152}
153
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200154#if STM32MP_SDMMC || STM32MP_EMMC
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200155static void boot_mmc(enum mmc_device_type mmc_dev_type,
156 uint16_t boot_interface_instance)
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200157{
158 int io_result __unused;
Yann Gautier8244e1d2018-10-15 09:36:58 +0200159 struct stm32_sdmmc2_params params;
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200160
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200161 zeromem(&params, sizeof(struct stm32_sdmmc2_params));
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200162
Yann Gautierac22dd52021-03-22 14:22:14 +0100163 mmc_info.mmc_dev_type = mmc_dev_type;
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200164
165 switch (boot_interface_instance) {
166 case 1:
167 params.reg_base = STM32MP_SDMMC1_BASE;
168 break;
169 case 2:
170 params.reg_base = STM32MP_SDMMC2_BASE;
171 break;
172 case 3:
173 params.reg_base = STM32MP_SDMMC3_BASE;
174 break;
175 default:
176 WARN("SDMMC instance not found, using default\n");
177 if (mmc_dev_type == MMC_IS_SD) {
178 params.reg_base = STM32MP_SDMMC1_BASE;
179 } else {
180 params.reg_base = STM32MP_SDMMC2_BASE;
181 }
182 break;
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200183 }
184
Yann Gautierac22dd52021-03-22 14:22:14 +0100185 params.device_info = &mmc_info;
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200186 if (stm32_sdmmc2_mmc_init(&params) != 0) {
187 ERROR("SDMMC%u init failed\n", boot_interface_instance);
188 panic();
189 }
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200190
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200191 /* Open MMC as a block device to read GPT table */
192 io_result = register_io_dev_block(&mmc_dev_con);
193 if (io_result != 0) {
194 panic();
195 }
Yann Gautier8244e1d2018-10-15 09:36:58 +0200196
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200197 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec,
198 &storage_dev_handle);
199 assert(io_result == 0);
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200200}
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200201#endif /* STM32MP_SDMMC || STM32MP_EMMC */
Yann Gautier8244e1d2018-10-15 09:36:58 +0200202
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200203#if STM32MP_SPI_NOR
204static void boot_spi_nor(boot_api_context_t *boot_context)
205{
206 int io_result __unused;
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200207
208 io_result = stm32_qspi_init();
209 assert(io_result == 0);
210
211 io_result = register_io_dev_mtd(&spi_dev_con);
212 assert(io_result == 0);
213
214 /* Open connections to device */
215 io_result = io_dev_open(spi_dev_con,
216 (uintptr_t)&spi_nor_dev_spec,
217 &storage_dev_handle);
218 assert(io_result == 0);
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200219}
220#endif /* STM32MP_SPI_NOR */
221
Lionel Debieve402a46b2019-11-04 12:28:15 +0100222#if STM32MP_RAW_NAND
223static void boot_fmc2_nand(boot_api_context_t *boot_context)
224{
225 int io_result __unused;
Lionel Debieve402a46b2019-11-04 12:28:15 +0100226
227 io_result = stm32_fmc2_init();
228 assert(io_result == 0);
229
230 /* Register the IO device on this platform */
231 io_result = register_io_dev_mtd(&nand_dev_con);
232 assert(io_result == 0);
233
234 /* Open connections to device */
235 io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec,
236 &storage_dev_handle);
237 assert(io_result == 0);
Lionel Debieve402a46b2019-11-04 12:28:15 +0100238}
239#endif /* STM32MP_RAW_NAND */
240
Lionel Debieve186b0462019-09-24 18:30:12 +0200241#if STM32MP_SPI_NAND
242static void boot_spi_nand(boot_api_context_t *boot_context)
243{
244 int io_result __unused;
Lionel Debieve186b0462019-09-24 18:30:12 +0200245
246 io_result = stm32_qspi_init();
247 assert(io_result == 0);
248
249 io_result = register_io_dev_mtd(&spi_dev_con);
250 assert(io_result == 0);
251
252 /* Open connections to device */
253 io_result = io_dev_open(spi_dev_con,
254 (uintptr_t)&spi_nand_dev_spec,
255 &storage_dev_handle);
256 assert(io_result == 0);
Lionel Debieve186b0462019-09-24 18:30:12 +0200257}
258#endif /* STM32MP_SPI_NAND */
259
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200260#if STM32MP_USB_PROGRAMMER
261static void mmap_io_setup(void)
262{
263 int io_result __unused;
264
265 io_result = register_io_dev_memmap(&memmap_dev_con);
266 assert(io_result == 0);
267
268 io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL,
269 &storage_dev_handle);
270 assert(io_result == 0);
271}
272
273static void stm32cubeprogrammer_usb(void)
274{
275 int ret __unused;
276 struct usb_handle *pdev;
277
278 /* Init USB on platform */
279 pdev = usb_dfu_plat_init();
280
281 ret = stm32cubeprog_usb_load(pdev, DWL_BUFFER_BASE, DWL_BUFFER_SIZE);
282 assert(ret == 0);
283}
284#endif
285
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200286void stm32mp_io_setup(void)
287{
288 int io_result __unused;
289 boot_api_context_t *boot_context =
290 (boot_api_context_t *)stm32mp_get_boot_ctx_address();
Yann Gautierf9d40d52019-01-17 14:41:46 +0100291
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200292 print_boot_device(boot_context);
Yann Gautier8244e1d2018-10-15 09:36:58 +0200293
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200294 if ((boot_context->boot_partition_used_toboot == 1U) ||
295 (boot_context->boot_partition_used_toboot == 2U)) {
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200296 INFO("Boot used partition fsbl%u\n",
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200297 boot_context->boot_partition_used_toboot);
298 }
Yann Gautier8244e1d2018-10-15 09:36:58 +0200299
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200300 io_result = register_io_dev_fip(&fip_dev_con);
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200301 assert(io_result == 0);
Yann Gautier8244e1d2018-10-15 09:36:58 +0200302
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200303 io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL,
304 &fip_dev_handle);
Yann Gautier8244e1d2018-10-15 09:36:58 +0200305
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200306 switch (boot_context->boot_interface_selected) {
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200307#if STM32MP_SDMMC
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200308 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
309 dmbsy();
310 boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
311 break;
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200312#endif
313#if STM32MP_EMMC
Yann Gautiereae3fbf2019-04-23 13:34:03 +0200314 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
315 dmbsy();
316 boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
Yann Gautier8244e1d2018-10-15 09:36:58 +0200317 break;
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200318#endif
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200319#if STM32MP_SPI_NOR
320 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
321 dmbsy();
322 boot_spi_nor(boot_context);
323 break;
324#endif
Lionel Debieve402a46b2019-11-04 12:28:15 +0100325#if STM32MP_RAW_NAND
326 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
327 dmbsy();
328 boot_fmc2_nand(boot_context);
329 break;
330#endif
Lionel Debieve186b0462019-09-24 18:30:12 +0200331#if STM32MP_SPI_NAND
332 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
333 dmbsy();
334 boot_spi_nand(boot_context);
335 break;
336#endif
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200337#if STM32MP_USB_PROGRAMMER
338 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
339 dmbsy();
340 mmap_io_setup();
341 break;
342#endif
Yann Gautier8244e1d2018-10-15 09:36:58 +0200343
344 default:
345 ERROR("Boot interface %d not supported\n",
346 boot_context->boot_interface_selected);
Yann Gautier4c2b73d2021-06-30 17:04:22 +0200347 panic();
Yann Gautier8244e1d2018-10-15 09:36:58 +0200348 break;
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200349 }
350}
351
352int bl2_plat_handle_pre_image_load(unsigned int image_id)
353{
354 static bool gpt_init_done __unused;
355 uint16_t boot_itf = stm32mp_get_boot_itf_selected();
356
357 switch (boot_itf) {
358#if STM32MP_SDMMC || STM32MP_EMMC
359 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
360 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
361 if (!gpt_init_done) {
362 const partition_entry_t *entry;
363
364 partition_init(GPT_IMAGE_ID);
365 entry = get_partition_entry(FIP_IMAGE_NAME);
366 if (entry == NULL) {
367 ERROR("Could NOT find the %s partition!\n",
368 FIP_IMAGE_NAME);
369 return -ENOENT;
370 }
371
372 image_block_spec.offset = entry->start;
373 image_block_spec.length = entry->length;
374
375 gpt_init_done = true;
Yann Gautiera3bd8d12021-06-18 11:33:26 +0200376 } else {
377 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
378
379 mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base;
380 mmc_block_dev_spec.buffer.length = bl_mem_params->image_info.image_max_size;
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200381 }
382
383 break;
384#endif
385
386#if STM32MP_RAW_NAND || STM32MP_SPI_NAND
387#if STM32MP_RAW_NAND
388 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
389#endif
390#if STM32MP_SPI_NAND
391 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
392#endif
393 image_block_spec.offset = STM32MP_NAND_FIP_OFFSET;
394 break;
395#endif
396
397#if STM32MP_SPI_NOR
398 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
399 image_block_spec.offset = STM32MP_NOR_FIP_OFFSET;
400 break;
401#endif
402
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200403#if STM32MP_USB_PROGRAMMER
404 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
405 if (image_id == FW_CONFIG_ID) {
406 stm32cubeprogrammer_usb();
407 /* FIP loaded at DWL address */
408 image_block_spec.offset = DWL_BUFFER_BASE;
409 image_block_spec.length = DWL_BUFFER_SIZE;
410 }
411 break;
412#endif
413
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200414 default:
415 ERROR("FIP Not found\n");
416 panic();
Yann Gautier8244e1d2018-10-15 09:36:58 +0200417 }
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200418
419 return 0;
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200420}
421
422/*
423 * Return an IO device handle and specification which can be used to access
424 * an image. Use this to enforce platform load policy.
425 */
426int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
427 uintptr_t *image_spec)
428{
429 int rc;
430 const struct plat_io_policy *policy;
431
Yann Gautier29f1f942021-07-13 18:07:41 +0200432 policy = FCONF_GET_PROPERTY(stm32mp, io_policies, image_id);
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200433 rc = policy->check(policy->image_spec);
434 if (rc == 0) {
435 *image_spec = policy->image_spec;
436 *dev_handle = *(policy->dev_handle);
437 }
438
439 return rc;
440}