blob: ae0d85daf32f2f7abef3a3e2249cab0eeca59c48 [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06002# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Juan Pablo Conde6aba3b12023-08-09 13:19:21 -05009ifeq (${ARCH},aarch32)
10 ifeq (${AARCH32_SP},none)
11 $(error Variable AARCH32_SP has to be set for AArch32)
12 endif
13endif
14
Soby Mathew0d268dc2016-07-11 14:13:56 +010015ifeq (${ARCH}, aarch64)
16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
17 # DRAM (if available) or the TZC secured area of DRAM.
Dimitris Papastamos8a418592018-01-02 10:25:50 +000018 # TZC secured DRAM is the default.
Dan Handley9df48042015-03-19 18:58:55 +000019
Dimitris Papastamos8a418592018-01-02 10:25:50 +000020 ARM_TSP_RAM_LOCATION ?= dram
Qixiang Xuc7b12c52017-10-13 09:04:12 +080021
Soby Mathew0d268dc2016-07-11 14:13:56 +010022 ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
28 else
29 $(error "Unsupported ARM_TSP_RAM_LOCATION value")
30 endif
Dan Handley9df48042015-03-19 18:58:55 +000031
Soby Mathew0d268dc2016-07-11 14:13:56 +010032 # Process flags
Soby Mathew0d268dc2016-07-11 14:13:56 +010033 # Process ARM_BL31_IN_DRAM flag
34 ARM_BL31_IN_DRAM := 0
35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
36 $(eval $(call add_define,ARM_BL31_IN_DRAM))
Roberto Vargasac6dc352017-10-20 10:46:23 +010037else
38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
Soby Mathew0d268dc2016-07-11 14:13:56 +010039endif
Dan Handley9df48042015-03-19 18:58:55 +000040
Roberto Vargasac6dc352017-10-20 10:46:23 +010041$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
42
43
Soby Mathew7799cf72015-04-16 14:49:09 +010044# For the original power-state parameter format, the State-ID can be encoded
45# according to the recommended encoding or zero. This flag determines which
46# State-ID encoding to be parsed.
47ARM_RECOM_STATE_ID_ENC := 0
48
Douglas Raillard66933ff2016-11-07 17:29:34 +000049# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
50# be set. Else throw a build error.
Soby Mathew7799cf72015-04-16 14:49:09 +010051ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
Douglas Raillard66933ff2016-11-07 17:29:34 +000053 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
54 PSCI_EXTENDED_STATE_ID is set for ARM platforms)
Soby Mathew7799cf72015-04-16 14:49:09 +010055 endif
56endif
57
58# Process ARM_RECOM_STATE_ID_ENC flag
59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
61
Juan Castillob6132f12015-10-06 14:01:35 +010062# Process ARM_DISABLE_TRUSTED_WDOG flag
Zelalem Awekeaf7e3a42021-10-01 12:30:49 -050063# By default, Trusted Watchdog is always enabled unless
64# SPIN_ON_BL1_EXIT or ENABLE_RME is set
Juan Castillob6132f12015-10-06 14:01:35 +010065ARM_DISABLE_TRUSTED_WDOG := 0
Zelalem Awekeaf7e3a42021-10-01 12:30:49 -050066ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
Juan Castillob6132f12015-10-06 14:01:35 +010067ARM_DISABLE_TRUSTED_WDOG := 1
68endif
69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
71
Juan Castilloaadf19a2015-11-06 16:02:32 +000072# Process ARM_CONFIG_CNTACR
73ARM_CONFIG_CNTACR := 1
74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
75$(eval $(call add_define,ARM_CONFIG_CNTACR))
76
David Wang0ba499f2016-03-07 11:02:57 +080077# Process ARM_BL31_IN_DRAM flag
78ARM_BL31_IN_DRAM := 0
79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
80$(eval $(call add_define,ARM_BL31_IN_DRAM))
81
Sandrine Bailleux2af9c392022-07-04 11:17:43 +020082# As per CCA security model, all root firmware must execute from on-chip secure
83# memory. This means we must not run BL31 from TZC-protected DRAM.
84ifeq (${ARM_BL31_IN_DRAM},1)
85 ifeq (${ENABLE_RME},1)
86 $(error "BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0")
87 endif
88endif
89
Summer Qin93c812f2017-02-28 16:46:17 +000090# Process ARM_PLAT_MT flag
91ARM_PLAT_MT := 0
92$(eval $(call assert_boolean,ARM_PLAT_MT))
93$(eval $(call add_define,ARM_PLAT_MT))
94
Antonio Nino Diazf09d0032017-04-11 14:04:56 +010095# Use translation tables library v2 by default
96ARM_XLAT_TABLES_LIB_V1 := 0
97$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
98$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
99
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100100# Don't have the Linux kernel as a BL33 image by default
101ARM_LINUX_KERNEL_AS_BL33 := 0
102$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
103$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
104
105ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
Andre Przywara6a3ac4e2021-02-08 17:40:48 +0000106 ifneq (${ARCH},aarch64)
Manish Pandey37c4ec22018-11-02 13:28:25 +0000107 ifneq (${RESET_TO_SP_MIN},1)
108 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
109 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100110 endif
111 ifndef PRELOADED_BL33_BASE
112 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
113 endif
Zelalem Aweke1e8e3fd2021-07-26 21:39:05 -0500114 ifeq (${RESET_TO_BL31},1)
115 ifndef ARM_PRELOADED_DTB_BASE
116 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is
117 used with RESET_TO_BL31.")
118 endif
119 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100120 endif
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100121endif
122
Antonio Nino Diaz01b6cb92017-05-24 14:11:07 +0100123# Use an implementation of SHA-256 with a smaller memory footprint but reduced
124# speed.
125$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
126
Summer Qin80726782017-04-20 16:28:39 +0100127# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
128# in the FIP if the platform requires.
129ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900130$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Summer Qin80726782017-04-20 16:28:39 +0100131endif
132ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900133$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Summer Qin80726782017-04-20 16:28:39 +0100134endif
135
Soby Mathew421dbc42016-05-23 16:07:53 +0100136# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
Soby Mathew0d268dc2016-07-11 14:13:56 +0100137ENABLE_PSCI_STAT := 1
dp-arm66abfbe2017-01-31 13:01:04 +0000138ENABLE_PMF := 1
Soby Mathew421dbc42016-05-23 16:07:53 +0100139
Alexei Fedorov2381d2e2020-09-01 15:38:32 +0100140# Override the standard libc with optimised libc_asm
141OVERRIDE_LIBC := 1
142ifeq (${OVERRIDE_LIBC},1)
143 include lib/libc/libc_asm.mk
144endif
145
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100146# On ARM platforms, separate the code and read-only data sections to allow
147# mapping the former as executable and the latter as execute-never.
148SEPARATE_CODE_AND_RODATA := 1
149
Madhukar Pappireddyd7419442020-01-27 15:38:26 -0600150# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
151# and NOBITS sections of BL31 image are adjacent to each other and loaded
152# into Trusted SRAM.
153SEPARATE_NOBITS_REGION := 0
154
155# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
156# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
157# the build to require that ARM_BL31_IN_DRAM is enabled as well.
158ifeq ($(SEPARATE_NOBITS_REGION),1)
159 ifneq ($(ARM_BL31_IN_DRAM),1)
160 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
161 endif
162 ifneq ($(RECLAIM_INIT_CODE),0)
163 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
164 endif
165endif
166
Manish Pandey928da862021-06-10 15:22:48 +0100167# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
168ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
169 ENABLE_PIE := 1
Manish Pandey2207e932019-11-06 13:17:46 +0000170endif
171
Manish V Badarkhedd6f2522021-02-22 17:30:17 +0000172# Disable GPT parser support, use FIP image by default
173ARM_GPT_SUPPORT := 0
174$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
175$(eval $(call add_define,ARM_GPT_SUPPORT))
176
177# Include necessary sources to parse GPT image
178ifeq (${ARM_GPT_SUPPORT}, 1)
179 BL2_SOURCES += drivers/partition/gpt.c \
180 drivers/partition/partition.c
181endif
182
Manish V Badarkhe7a867922021-04-22 14:41:27 +0100183# Enable CRC instructions via extension for ARMv8-A CPUs.
184# For ARMv8.1-A, and onwards CRC instructions are default enabled.
185# Enable HW computed CRC support unconditionally in BL2 component.
Diego Sueiro4d708ac2022-11-03 17:01:39 +0000186ifeq (${ARM_ARCH_MAJOR},8)
187 ifeq (${ARM_ARCH_MINOR},0)
188 BL2_CPPFLAGS += -march=armv8-a+crc
189 endif
Manish V Badarkhe7a867922021-04-22 14:41:27 +0100190endif
191
Manish V Badarkhed2f0a7a2021-06-25 23:43:33 +0100192ifeq ($(PSA_FWU_SUPPORT),1)
193 # GPT support is recommended as per PSA FWU specification hence
194 # PSA FWU implementation is tightly coupled with GPT support,
195 # and it does not support other formats.
196 ifneq ($(ARM_GPT_SUPPORT),1)
197 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
198 endif
199 FWU_MK := drivers/fwu/fwu.mk
200 $(info Including ${FWU_MK})
201 include ${FWU_MK}
202endif
203
Soby Mathew0d268dc2016-07-11 14:13:56 +0100204ifeq (${ARCH}, aarch64)
205PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
206endif
Dan Handley9df48042015-03-19 18:58:55 +0000207
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100208PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100209 plat/arm/common/arm_common.c \
210 plat/arm/common/arm_console.c
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100211
212ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
Gary Morrison3d7f6542021-01-27 13:08:47 -0600213PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100214 lib/xlat_tables/${ARCH}/xlat_tables.c
215else
Gary Morrison3d7f6542021-01-27 13:08:47 -0600216ifeq (${XLAT_MPU_LIB_V1}, 1)
217include lib/xlat_mpu/xlat_mpu.mk
218PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS}
219else
Antonio Nino Diaz719bf852017-02-23 17:22:58 +0000220include lib/xlat_tables_v2/xlat_tables.mk
Gary Morrison3d7f6542021-01-27 13:08:47 -0600221PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
222endif
Antonio Nino Diazf09d0032017-04-11 14:04:56 +0100223endif
Dan Handley9df48042015-03-19 18:58:55 +0000224
Louis Mayencourt6b232d92020-02-28 16:57:30 +0000225ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100226 plat/arm/common/fconf/arm_fconf_io.c
Olivier Deprez93df21f2020-01-23 11:24:33 +0100227ifeq (${SPD},spmd)
Balint Dobszay719ba9c2021-03-26 16:23:18 +0100228 ifeq (${BL2_ENABLE_SP_LOAD},1)
Olivier Deprez042db532020-03-19 09:27:11 +0100229 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
230 endif
Olivier Deprez93df21f2020-01-23 11:24:33 +0100231endif
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100232
Aditya Angadi20b48412019-04-16 11:29:14 +0530233BL1_SOURCES += drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000234 drivers/io/io_memmap.c \
235 drivers/io/io_storage.c \
236 plat/arm/common/arm_bl1_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000237 plat/arm/common/arm_err.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100238 ${ARM_IO_SOURCES}
239
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000240ifdef EL3_PAYLOAD_BASE
Dimitris Papastamosd7a36512018-06-18 13:01:06 +0100241# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000242# their holding pen
243BL1_SOURCES += plat/arm/common/arm_pm.c
244endif
Dan Handley9df48042015-03-19 18:58:55 +0000245
Soby Mathew1ced6b82017-06-12 12:37:10 +0100246BL2_SOURCES += drivers/delay_timer/delay_timer.c \
247 drivers/delay_timer/generic_delay_timer.c \
248 drivers/io/io_fip.c \
Dan Handley9df48042015-03-19 18:58:55 +0000249 drivers/io/io_memmap.c \
250 drivers/io/io_storage.c \
251 plat/arm/common/arm_bl2_setup.c \
Soby Mathew94273572018-03-07 11:32:04 +0000252 plat/arm/common/arm_err.c \
Manish V Badarkhea26bf352021-07-02 20:29:56 +0100253 common/tf_crc32.c \
Louis Mayencourtbadcac82019-10-24 15:18:46 +0100254 ${ARM_IO_SOURCES}
Roberto Vargas52207802017-11-17 13:22:18 +0000255
Louis Mayencourt944ade82019-08-08 12:03:26 +0100256# Firmware Configuration Framework sources
257include lib/fconf/fconf.mk
Roberto Vargas52207802017-11-17 13:22:18 +0000258
Chris Kayb296ada2021-05-20 13:22:43 +0100259BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
260BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
261
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000262# Add `libfdt` and Arm common helpers required for Dynamic Config
263include lib/libfdt/libfdt.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100264
265DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000266 plat/arm/common/arm_dyn_cfg_helpers.c \
David Horstmannb2df4c12021-04-08 14:50:21 +0100267 common/uuid.c
Soby Mathew96a1c6b2018-01-15 14:45:33 +0000268
Chris Kaye9272152021-09-28 15:52:14 +0100269DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES}
270
Soby Mathew45e39e22018-03-26 15:16:46 +0100271BL1_SOURCES += ${DYN_CFG_SOURCES}
272BL2_SOURCES += ${DYN_CFG_SOURCES}
273
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600274ifeq (${RESET_TO_BL2},1)
Roberto Vargas52207802017-11-17 13:22:18 +0000275BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
276endif
277
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000278# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
279# the AArch32 descriptors.
280ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
281BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
282else
Vishnu Banavath2b651ea2022-01-19 18:43:12 +0000283ifneq (${PLAT}, corstone1000)
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000284BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
285endif
Abdellatif El Khlifiad9b8e52021-04-21 17:20:43 +0100286endif
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000287BL2_SOURCES += plat/arm/common/arm_image_load.c \
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100288 common/desc_image_load.c
Summer Qin9db8f2e2017-04-24 16:49:28 +0100289ifeq (${SPD},opteed)
290BL2_SOURCES += lib/optee/optee_utils.c
291endif
Dan Handley9df48042015-03-19 18:58:55 +0000292
Soby Mathew1ced6b82017-06-12 12:37:10 +0100293BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
294 drivers/delay_timer/generic_delay_timer.c \
295 plat/arm/common/arm_bl2u_setup.c
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100296
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000297BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
Dan Handley9df48042015-03-19 18:58:55 +0000298 plat/arm/common/arm_pm.c \
Dan Handley9df48042015-03-19 18:58:55 +0000299 plat/arm/common/arm_topology.c \
Soby Mathewf6c41082016-05-03 12:31:18 +0100300 plat/common/plat_psci_common.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100301
Rajasekaran Kalidoss85999a82023-05-08 14:55:13 +0200302ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),)
Mikael Olsson7da66192021-02-12 17:30:22 +0100303ARM_SVC_HANDLER_SRCS :=
304
305ifeq (${ENABLE_PMF},1)
306ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c
307endif
308
Rajasekaran Kalidoss85999a82023-05-08 14:55:13 +0200309ifeq (${ETHOSN_NPU_DRIVER},1)
Mikael Olsson7da66192021-02-12 17:30:22 +0100310ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \
311 drivers/delay_timer/delay_timer.c \
312 drivers/arm/ethosn/ethosn_smc.c
Rajasekaran Kalidoss85999a82023-05-08 14:55:13 +0200313ifeq (${ETHOSN_NPU_TZMP1},1)
Mikael Olssona7df0d62023-01-13 09:56:41 +0100314ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c
315endif
Mikael Olsson7da66192021-02-12 17:30:22 +0100316endif
317
Bence Szépkúti16362c62019-10-24 15:53:23 +0200318ifeq (${ARCH}, aarch64)
319BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
320 plat/arm/common/arm_sip_svc.c \
Madhukar Pappireddycc307102023-09-09 23:02:34 -0500321 plat/arm/common/plat_arm_sip_svc.c \
Mikael Olsson7da66192021-02-12 17:30:22 +0100322 ${ARM_SVC_HANDLER_SRCS}
Bence Szépkúti78dc10c2019-11-07 12:09:24 +0100323else
324BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
Madhukar Pappireddycc307102023-09-09 23:02:34 -0500325 plat/arm/common/plat_arm_sip_svc.c \
Mikael Olsson7da66192021-02-12 17:30:22 +0100326 ${ARM_SVC_HANDLER_SRCS}
dp-arm1cebefd2016-09-19 11:21:03 +0100327endif
Bence Szépkúti16362c62019-10-24 15:53:23 +0200328endif
dp-arm1cebefd2016-09-19 11:21:03 +0100329
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100330ifeq (${EL3_EXCEPTION_HANDLING},1)
Sandeep Tripathy1c478392020-08-12 18:42:13 +0530331BL31_SOURCES += plat/common/aarch64/plat_ehf.c
Jeenu Viswambharanb1837452017-10-24 11:47:13 +0100332endif
333
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100334ifeq (${SDEI_SUPPORT},1)
335BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
Balint Dobszayd0dbd5e2019-12-18 15:28:00 +0100336ifeq (${SDEI_IN_FCONF},1)
337BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
338endif
Jeenu Viswambharana5acc0a2017-09-22 08:32:10 +0100339endif
340
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000341# RAS sources
Manish Pandeyf90a73c2023-10-10 15:42:19 +0100342ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1)
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000343BL31_SOURCES += lib/extensions/ras/std_err_record.c \
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100344 lib/extensions/ras/ras_common.c
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000345endif
346
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000347# Pointer Authentication sources
348ifeq (${ENABLE_PAUTH}, 1)
Boyan Karatotev02576932023-01-13 16:47:07 +0000349PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c
Antonio Nino Diaz9c852aa2019-01-31 11:01:10 +0000350endif
351
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100352ifeq (${SPD},spmd)
353BL31_SOURCES += plat/common/plat_spmd_manifest.c \
David Horstmannb2df4c12021-04-08 14:50:21 +0100354 common/uuid.c \
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100355 ${LIBFDT_SRCS}
356
Chris Kaye9272152021-09-28 15:52:14 +0100357BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
Achin Gupta60b7b8a2019-10-11 15:50:43 +0100358endif
359
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100360ifeq (${DRTM_SUPPORT},1)
361BL31_SOURCES += plat/arm/common/arm_err.c
362endif
363
Juan Castilloa08a5e72015-05-19 11:54:12 +0100364ifneq (${TRUSTED_BOARD_BOOT},0)
365
Juan Castilloa08a5e72015-05-19 11:54:12 +0100366 # Include common TBB sources
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000367 AUTH_SOURCES := drivers/auth/auth_mod.c \
368 drivers/auth/img_parser_mod.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100369
370 # Include the selected chain of trust sources.
371 ifeq (${COT},tbbr)
laurenw-arm56f1e3e2021-03-03 14:19:38 -0600372 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \
Manish V Badarkhe39317ab2020-07-23 10:43:57 +0100373 drivers/auth/tbbr/tbbr_cot_bl1.c
374 ifneq (${COT_DESC_IN_DTB},0)
375 BL2_SOURCES += lib/fconf/fconf_cot_getter.c
376 else
Rob Hughes9a2177a2023-01-17 16:10:26 +0000377 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c
378 # Juno has its own TBBR CoT file for BL2
379 ifneq (${PLAT},juno)
380 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_bl2.c
381 endif
Manish V Badarkhe39317ab2020-07-23 10:43:57 +0100382 endif
Sandrine Bailleux012f8712020-02-06 14:59:33 +0100383 else ifeq (${COT},dualroot)
384 AUTH_SOURCES += drivers/auth/dualroot/cot.c
laurenw-armd3449782022-04-21 16:50:49 -0500385 else ifeq (${COT},cca)
386 AUTH_SOURCES += drivers/auth/cca/cot.c
Sandrine Bailleuxd4c1d442020-01-15 10:23:25 +0100387 else
388 $(error Unknown chain of trust ${COT})
389 endif
Juan Castilloa08a5e72015-05-19 11:54:12 +0100390
Yatharth Kocharf11b29a2016-02-01 11:04:46 +0000391 BL1_SOURCES += ${AUTH_SOURCES} \
392 bl1/tbbr/tbbr_img_desc.c \
dp-armb3e85802016-12-12 14:48:13 +0000393 plat/arm/common/arm_bl1_fwu.c \
394 plat/common/tbbr/plat_tbbr.c
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100395
dp-armb3e85802016-12-12 14:48:13 +0000396 BL2_SOURCES += ${AUTH_SOURCES} \
Manish V Badarkhefe46f5f2020-05-27 09:39:42 +0100397 plat/common/tbbr/plat_tbbr.c
Juan Castilloa08a5e72015-05-19 11:54:12 +0100398
Masahiro Yamada9c5ca522018-01-26 11:42:01 +0900399 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
Yatharth Kochard1a93432015-10-12 12:33:47 +0100400
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000401 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
402
403 $(info Including ${IMG_PARSER_LIB_MK})
404 include ${IMG_PARSER_LIB_MK}
405endif
406
Manish V Badarkhee112a5a2021-10-06 23:41:50 +0100407# Include Measured Boot makefile before any Crypto library makefile.
408# Crypto library makefile may need default definitions of Measured Boot build
409# flags present in Measured Boot makefile.
Manish V Badarkhe19b22f92022-06-17 11:42:17 +0100410ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
Manish V Badarkhee112a5a2021-10-06 23:41:50 +0100411 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
412 $(info Including ${MEASURED_BOOT_MK})
413 include ${MEASURED_BOOT_MK}
Manish V Badarkhef9c366c2022-01-18 22:40:17 +0000414
laurenw-arm7834aa02022-05-31 16:39:09 -0500415 ifneq (${MBOOT_EL_HASH_ALG}, sha256)
416 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
417 endif
418
Manish V Badarkhe19b22f92022-06-17 11:42:17 +0100419 ifeq (${MEASURED_BOOT},1)
420 BL1_SOURCES += ${EVENT_LOG_SOURCES}
421 BL2_SOURCES += ${EVENT_LOG_SOURCES}
422 endif
423
424 ifeq (${DRTM_SUPPORT},1)
425 BL31_SOURCES += ${EVENT_LOG_SOURCES}
426 endif
Manish V Badarkhee112a5a2021-10-06 23:41:50 +0100427endif
428
Manish V Badarkhebf4db5c2022-02-25 09:06:57 +0000429ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000430 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \
431 lib/fconf/fconf_tbbr_getter.c
432 BL1_SOURCES += ${CRYPTO_SOURCES}
433 BL2_SOURCES += ${CRYPTO_SOURCES}
Manish V Badarkhebf4db5c2022-02-25 09:06:57 +0000434 BL31_SOURCES += drivers/auth/crypto_mod.c
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000435
Juan Castilloa08a5e72015-05-19 11:54:12 +0100436 # We expect to locate the *.mk files under the directories specified below
Sandrine Bailleux2f37ce62023-10-26 15:14:42 +0200437 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
Juan Castilloa08a5e72015-05-19 11:54:12 +0100438
439 $(info Including ${CRYPTO_LIB_MK})
440 include ${CRYPTO_LIB_MK}
Juan Castilloa08a5e72015-05-19 11:54:12 +0100441endif
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100442
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100443ifeq (${RECLAIM_INIT_CODE}, 1)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100444 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
445 $(error "To reclaim init code xlat tables v2 must be used")
446 endif
447endif