blob: def327605cf8377ee38cab33cd6bf39a06870071 [file] [log] [blame]
Jorge Ramirez-Ortizbf084dc2018-09-23 09:36:13 +02001/*
2 * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef RCAR_PRIVATE_H
8#define RCAR_PRIVATE_H
Jorge Ramirez-Ortizbf084dc2018-09-23 09:36:13 +02009
Jorge Ramirez-Ortizbf084dc2018-09-23 09:36:13 +020010#include <platform_def.h>
11
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000012#include <common/bl_common.h>
13#include <lib/bakery_lock.h>
14#include <lib/el3_runtime/cpu_data.h>
15
Jorge Ramirez-Ortizbf084dc2018-09-23 09:36:13 +020016typedef volatile struct mailbox {
17 unsigned long value __aligned(CACHE_WRITEBACK_GRANULE);
18} mailbox_t;
19
20/*
21 * This structure represents the superset of information that is passed to
22 * BL31 e.g. while passing control to it from BL2 which is bl31_params
23 * and bl31_plat_params and its elements
24 */
25typedef struct bl2_to_bl31_params_mem {
26 image_info_t bl32_image_info;
27 image_info_t bl33_image_info;
28 entry_point_info_t bl33_ep_info;
29 entry_point_info_t bl32_ep_info;
30} bl2_to_bl31_params_mem_t;
31
32#if USE_COHERENT_MEM
33#define RCAR_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(rcar_lock);
34#define rcar_lock_init() bakery_lock_init(&rcar_lock)
35#define rcar_lock_get() bakery_lock_get(&rcar_lock)
36#define rcar_lock_release() bakery_lock_release(&rcar_lock)
37#else
38/*
39 * Constants to specify how many bakery locks this platform implements. These
40 * are used if the platform chooses not to use coherent memory for bakery lock
41 * data structures.
42 */
43#define RCAR_MAX_BAKERIES 2
44#define RCAR_PWRC_BAKERY_ID 0
45
46/*
47 * Definition of structure which holds platform specific per-cpu data. Currently
48 * it holds only the bakery lock information for each cpu. Constants to
49 * specify how many bakeries this platform implements and bakery ids are
50 * specified in rcar_def.h
51 */
52typedef struct rcar_cpu_data {
53 bakery_info_t pcpu_bakery_info[RCAR_MAX_BAKERIES];
54} rcar_cpu_data_t;
55
56#define RCAR_CPU_DATA_LOCK_OFFSET \
57 __builtin_offsetof(rcar_cpu_data_t, pcpu_bakery_info)
58/*
59 * Helper macros for bakery lock api when using the above rcar_cpu_data_t for
60 * bakery lock data structures. It assumes that the bakery_info is at the
61 * beginning of the platform specific per-cpu data.
62 */
63#define rcar_lock_init(_lock_arg)
64
65#define rcar_lock_get(_lock_arg) \
66 bakery_lock_get(_lock_arg, \
67 CPU_DATA_PLAT_PCPU_OFFSET + RCAR_CPU_DATA_LOCK_OFFSET)
68
69#define rcar_lock_release(_lock_arg) \
70 bakery_lock_release(_lock_arg, \
71 CPU_DATA_PLAT_PCPU_OFFSET + RCAR_CPU_DATA_LOCK_OFFSET)
72/* Ensure that the size of the RCAR specific per-cpu data structure and the size
73 * of the memory allocated in generic per-cpu data for the platform are the same
74 */
75CASSERT(PLAT_PCPU_DATA_SIZE == sizeof(rcar_cpu_data_t),
76 rcar_pcpu_data_size_mismatch);
77#endif
78/*
79 * Function and variable prototypes
80 */
81void rcar_configure_mmu_el3(unsigned long total_base,
82 unsigned long total_size,
83 unsigned long ro_start, unsigned long ro_limit
84#if USE_COHERENT_MEM
85 , unsigned long coh_start, unsigned long coh_limit
86#endif
87 );
88
89void rcar_setup_topology(void);
90void rcar_cci_disable(void);
91void rcar_cci_enable(void);
92void rcar_cci_init(void);
93
94void plat_invalidate_icache(void);
95void plat_cci_disable(void);
96void plat_cci_enable(void);
97void plat_cci_init(void);
98
99void mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit);
100void cpg_write(uintptr_t regadr, uint32_t regval);
101
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000102#endif /* RCAR_PRIVATE_H */