blob: dd35826014f9cc5ddb0df3d0c10a9361e7427fdc [file] [log] [blame]
Jorge Ramirez-Ortizbf084dc2018-09-23 09:36:13 +02001/*
2 * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef RCAR_PRIVATE_H__
8#define RCAR_PRIVATE_H__
9
10#include <bakery_lock.h>
11#include <bl_common.h>
12#include <cpu_data.h>
13#include <platform_def.h>
14
15typedef volatile struct mailbox {
16 unsigned long value __aligned(CACHE_WRITEBACK_GRANULE);
17} mailbox_t;
18
19/*
20 * This structure represents the superset of information that is passed to
21 * BL31 e.g. while passing control to it from BL2 which is bl31_params
22 * and bl31_plat_params and its elements
23 */
24typedef struct bl2_to_bl31_params_mem {
25 image_info_t bl32_image_info;
26 image_info_t bl33_image_info;
27 entry_point_info_t bl33_ep_info;
28 entry_point_info_t bl32_ep_info;
29} bl2_to_bl31_params_mem_t;
30
31#if USE_COHERENT_MEM
32#define RCAR_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(rcar_lock);
33#define rcar_lock_init() bakery_lock_init(&rcar_lock)
34#define rcar_lock_get() bakery_lock_get(&rcar_lock)
35#define rcar_lock_release() bakery_lock_release(&rcar_lock)
36#else
37/*
38 * Constants to specify how many bakery locks this platform implements. These
39 * are used if the platform chooses not to use coherent memory for bakery lock
40 * data structures.
41 */
42#define RCAR_MAX_BAKERIES 2
43#define RCAR_PWRC_BAKERY_ID 0
44
45/*
46 * Definition of structure which holds platform specific per-cpu data. Currently
47 * it holds only the bakery lock information for each cpu. Constants to
48 * specify how many bakeries this platform implements and bakery ids are
49 * specified in rcar_def.h
50 */
51typedef struct rcar_cpu_data {
52 bakery_info_t pcpu_bakery_info[RCAR_MAX_BAKERIES];
53} rcar_cpu_data_t;
54
55#define RCAR_CPU_DATA_LOCK_OFFSET \
56 __builtin_offsetof(rcar_cpu_data_t, pcpu_bakery_info)
57/*
58 * Helper macros for bakery lock api when using the above rcar_cpu_data_t for
59 * bakery lock data structures. It assumes that the bakery_info is at the
60 * beginning of the platform specific per-cpu data.
61 */
62#define rcar_lock_init(_lock_arg)
63
64#define rcar_lock_get(_lock_arg) \
65 bakery_lock_get(_lock_arg, \
66 CPU_DATA_PLAT_PCPU_OFFSET + RCAR_CPU_DATA_LOCK_OFFSET)
67
68#define rcar_lock_release(_lock_arg) \
69 bakery_lock_release(_lock_arg, \
70 CPU_DATA_PLAT_PCPU_OFFSET + RCAR_CPU_DATA_LOCK_OFFSET)
71/* Ensure that the size of the RCAR specific per-cpu data structure and the size
72 * of the memory allocated in generic per-cpu data for the platform are the same
73 */
74CASSERT(PLAT_PCPU_DATA_SIZE == sizeof(rcar_cpu_data_t),
75 rcar_pcpu_data_size_mismatch);
76#endif
77/*
78 * Function and variable prototypes
79 */
80void rcar_configure_mmu_el3(unsigned long total_base,
81 unsigned long total_size,
82 unsigned long ro_start, unsigned long ro_limit
83#if USE_COHERENT_MEM
84 , unsigned long coh_start, unsigned long coh_limit
85#endif
86 );
87
88void rcar_setup_topology(void);
89void rcar_cci_disable(void);
90void rcar_cci_enable(void);
91void rcar_cci_init(void);
92
93void plat_invalidate_icache(void);
94void plat_cci_disable(void);
95void plat_cci_enable(void);
96void plat_cci_init(void);
97
98void mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit);
99void cpg_write(uintptr_t regadr, uint32_t regval);
100
101#endif