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Hadi Asyrafiab1132f2019-10-22 10:31:45 +08001/*
2 * Copyright (c) 2019, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef SOCFPGA_SIP_SVC_H
8#define SOCFPGA_SIP_SVC_H
9
10
11/* SiP status response */
12#define INTEL_SIP_SMC_STATUS_OK 0
Hadi Asyrafiab1132f2019-10-22 10:31:45 +080013#define INTEL_SIP_SMC_STATUS_BUSY 0x1
14#define INTEL_SIP_SMC_STATUS_REJECTED 0x2
Abdul Halim, Muhammad Hadi Asyrafi25f623e2020-02-27 10:23:48 +080015#define INTEL_SIP_SMC_STATUS_ERROR 0x4
16#define INTEL_SIP_SMC_RSU_ERROR 0x7
17
Hadi Asyrafiab1132f2019-10-22 10:31:45 +080018
19/* SMC SiP service function identifier */
20#define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001
21#define INTEL_SIP_SMC_FPGA_CONFIG_WRITE 0x42000002
22#define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE 0xC2000003
23#define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE 0xC2000004
24#define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM 0xC2000005
25#define INTEL_SIP_SMC_REG_READ 0xC2000007
26#define INTEL_SIP_SMC_REG_WRITE 0xC2000008
27#define INTEL_SIP_SMC_REG_UPDATE 0xC2000009
28#define INTEL_SIP_SMC_RSU_STATUS 0xC200000B
29#define INTEL_SIP_SMC_RSU_UPDATE 0xC200000C
30#define INTEL_SIP_LEGACY_SMC_ECC_DBE 0xC200000D
31#define INTEL_SIP_SMC_RSU_NOTIFY 0xC200000E
32#define INTEL_SIP_SMC_RSU_RETRY_COUNTER 0xC200000F
Hadi Asyrafia33e8102019-12-17 19:30:41 +080033#define INTEL_SIP_SMC_MBOX_SEND_CMD 0xC200001E
Hadi Asyrafiab1132f2019-10-22 10:31:45 +080034
35/* FPGA config helpers */
Tien Hock, Loh500b2322019-10-30 14:49:40 +080036#define INTEL_SIP_SMC_FPGA_CONFIG_ADDR 0x400000
Hadi Asyrafiab1132f2019-10-22 10:31:45 +080037#define INTEL_SIP_SMC_FPGA_CONFIG_SIZE 16777216
38
39/* SMC function IDs for SiP Service queries */
40#define SIP_SVC_CALL_COUNT 0x8200ff00
41#define SIP_SVC_UID 0x8200ff01
42#define SIP_SVC_VERSION 0x8200ff03
43
44/* SiP Service Calls version numbers */
45#define SIP_SVC_VERSION_MAJOR 0
46#define SIP_SVC_VERSION_MINOR 1
47
48#endif /* SOCFPGA_SIP_SVC_H */