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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch.h>
Andrew Thoelke38bde412014-03-18 13:46:55 +000032#include <asm_macros.S>
Dan Handleyed6ff952014-05-14 17:44:19 +010033#include <platform_def.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010034
35
Achin Gupta4f6ad662013-10-25 09:08:21 +010036 .weak platform_get_core_pos
Achin Gupta4f6ad662013-10-25 09:08:21 +010037 .weak platform_is_primary_cpu
Achin Gupta4f6ad662013-10-25 09:08:21 +010038 .weak platform_check_mpidr
39 .weak plat_report_exception
40
41 /* -----------------------------------------------------
Achin Gupta4f6ad662013-10-25 09:08:21 +010042 * int platform_get_core_pos(int mpidr);
43 * With this function: CorePos = (ClusterId * 4) +
44 * CoreId
45 * -----------------------------------------------------
46 */
Andrew Thoelke38bde412014-03-18 13:46:55 +000047func platform_get_core_pos
Achin Gupta4f6ad662013-10-25 09:08:21 +010048 and x1, x0, #MPIDR_CPU_MASK
49 and x0, x0, #MPIDR_CLUSTER_MASK
50 add x0, x1, x0, LSR #6
51 ret
52
Achin Gupta4f6ad662013-10-25 09:08:21 +010053 /* -----------------------------------------------------
54 * void platform_is_primary_cpu (unsigned int mpid);
55 *
56 * Given the mpidr say whether this cpu is the primary
57 * cpu (applicable ony after a cold boot)
58 * -----------------------------------------------------
59 */
Andrew Thoelke38bde412014-03-18 13:46:55 +000060func platform_is_primary_cpu
Achin Gupta4f6ad662013-10-25 09:08:21 +010061 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
62 cmp x0, #PRIMARY_CPU
63 cset x0, eq
64 ret
65
Achin Gupta4f6ad662013-10-25 09:08:21 +010066 /* -----------------------------------------------------
Achin Gupta4f6ad662013-10-25 09:08:21 +010067 * Placeholder function which should be redefined by
68 * each platform.
69 * -----------------------------------------------------
70 */
Andrew Thoelke38bde412014-03-18 13:46:55 +000071func platform_check_mpidr
Achin Gupta4f6ad662013-10-25 09:08:21 +010072 mov x0, xzr
73 ret
74
75 /* -----------------------------------------------------
76 * Placeholder function which should be redefined by
77 * each platform.
78 * -----------------------------------------------------
79 */
Andrew Thoelke38bde412014-03-18 13:46:55 +000080func plat_report_exception
Achin Gupta4f6ad662013-10-25 09:08:21 +010081 ret