Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 7 | #include <assert.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 8 | |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 9 | #include <platform_def.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 10 | |
| 11 | #include <arch_helpers.h> |
| 12 | #include <common/bl_common.h> |
| 13 | #include <common/debug.h> |
| 14 | #include <drivers/arm/gicv2.h> |
| 15 | #include <lib/mmio.h> |
| 16 | #include <lib/xlat_tables/xlat_tables_v2.h> |
| 17 | #include <plat/common/platform.h> |
| 18 | |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 19 | #include <stm32mp1_private.h> |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 20 | |
| 21 | #define MAP_SRAM MAP_REGION_FLAT(STM32MP1_SRAM_BASE, \ |
| 22 | STM32MP1_SRAM_SIZE, \ |
| 23 | MT_MEMORY | \ |
| 24 | MT_RW | \ |
| 25 | MT_SECURE | \ |
| 26 | MT_EXECUTE_NEVER) |
| 27 | |
| 28 | #define MAP_DEVICE1 MAP_REGION_FLAT(STM32MP1_DEVICE1_BASE, \ |
| 29 | STM32MP1_DEVICE1_SIZE, \ |
| 30 | MT_DEVICE | \ |
| 31 | MT_RW | \ |
| 32 | MT_SECURE | \ |
| 33 | MT_EXECUTE_NEVER) |
| 34 | |
| 35 | #define MAP_DEVICE2 MAP_REGION_FLAT(STM32MP1_DEVICE2_BASE, \ |
| 36 | STM32MP1_DEVICE2_SIZE, \ |
| 37 | MT_DEVICE | \ |
| 38 | MT_RW | \ |
| 39 | MT_SECURE | \ |
| 40 | MT_EXECUTE_NEVER) |
| 41 | |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 42 | #define MAP_DDR MAP_REGION_FLAT(STM32MP1_DDR_BASE, \ |
| 43 | STM32MP1_DDR_MAX_SIZE, \ |
| 44 | MT_MEMORY | \ |
| 45 | MT_RW | \ |
| 46 | MT_SECURE | \ |
| 47 | MT_EXECUTE_NEVER) |
| 48 | |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 49 | #define MAP_DDR_NS MAP_REGION_FLAT(STM32MP1_DDR_BASE, \ |
| 50 | STM32MP1_DDR_MAX_SIZE, \ |
| 51 | MT_MEMORY | \ |
| 52 | MT_RW | \ |
| 53 | MT_NS | \ |
| 54 | MT_EXECUTE_NEVER) |
| 55 | |
| 56 | #if defined(IMAGE_BL2) |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 57 | static const mmap_region_t stm32mp1_mmap[] = { |
| 58 | MAP_SRAM, |
| 59 | MAP_DEVICE1, |
| 60 | MAP_DEVICE2, |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 61 | MAP_DDR, |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 62 | {0} |
| 63 | }; |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 64 | #endif |
| 65 | #if defined(IMAGE_BL32) |
| 66 | static const mmap_region_t stm32mp1_mmap[] = { |
| 67 | MAP_SRAM, |
| 68 | MAP_DEVICE1, |
| 69 | MAP_DEVICE2, |
| 70 | MAP_DDR_NS, |
| 71 | {0} |
| 72 | }; |
| 73 | #endif |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 74 | |
| 75 | void configure_mmu(void) |
| 76 | { |
| 77 | mmap_add(stm32mp1_mmap); |
| 78 | init_xlat_tables(); |
| 79 | |
Antonio Nino Diaz | 4bef6b0 | 2018-08-07 16:35:54 +0100 | [diff] [blame] | 80 | enable_mmu_svc_mon(0); |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 81 | } |
| 82 | |
| 83 | uintptr_t plat_get_ns_image_entrypoint(void) |
| 84 | { |
| 85 | return BL33_BASE; |
| 86 | } |
| 87 | |
| 88 | unsigned int plat_get_syscnt_freq2(void) |
| 89 | { |
| 90 | return read_cntfrq_el0(); |
| 91 | } |
| 92 | |
| 93 | /* Functions to save and get boot context address given by ROM code */ |
| 94 | static uintptr_t boot_ctx_address; |
| 95 | |
| 96 | void stm32mp1_save_boot_ctx_address(uintptr_t address) |
| 97 | { |
| 98 | boot_ctx_address = address; |
| 99 | } |
| 100 | |
| 101 | uintptr_t stm32mp1_get_boot_ctx_address(void) |
| 102 | { |
| 103 | return boot_ctx_address; |
| 104 | } |