blob: e2f90d284e88cb136b0e870b1b5d85bdb6588273 [file] [log] [blame]
Yann Gautier4b0c72a2018-07-16 10:54:09 +02001/*
2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch_helpers.h>
8#include <assert.h>
9#include <bl_common.h>
10#include <debug.h>
11#include <gicv2.h>
12#include <mmio.h>
13#include <platform_def.h>
14#include <platform.h>
15#include <stm32mp1_private.h>
16#include <xlat_tables_v2.h>
17
18#define MAP_SRAM MAP_REGION_FLAT(STM32MP1_SRAM_BASE, \
19 STM32MP1_SRAM_SIZE, \
20 MT_MEMORY | \
21 MT_RW | \
22 MT_SECURE | \
23 MT_EXECUTE_NEVER)
24
25#define MAP_DEVICE1 MAP_REGION_FLAT(STM32MP1_DEVICE1_BASE, \
26 STM32MP1_DEVICE1_SIZE, \
27 MT_DEVICE | \
28 MT_RW | \
29 MT_SECURE | \
30 MT_EXECUTE_NEVER)
31
32#define MAP_DEVICE2 MAP_REGION_FLAT(STM32MP1_DEVICE2_BASE, \
33 STM32MP1_DEVICE2_SIZE, \
34 MT_DEVICE | \
35 MT_RW | \
36 MT_SECURE | \
37 MT_EXECUTE_NEVER)
38
Yann Gautiercaf575b2018-07-24 17:18:19 +020039#define MAP_DDR MAP_REGION_FLAT(STM32MP1_DDR_BASE, \
40 STM32MP1_DDR_MAX_SIZE, \
41 MT_MEMORY | \
42 MT_RW | \
43 MT_SECURE | \
44 MT_EXECUTE_NEVER)
45
Yann Gautier4b0c72a2018-07-16 10:54:09 +020046static const mmap_region_t stm32mp1_mmap[] = {
47 MAP_SRAM,
48 MAP_DEVICE1,
49 MAP_DEVICE2,
Yann Gautiercaf575b2018-07-24 17:18:19 +020050 MAP_DDR,
Yann Gautier4b0c72a2018-07-16 10:54:09 +020051 {0}
52};
53
54void configure_mmu(void)
55{
56 mmap_add(stm32mp1_mmap);
57 init_xlat_tables();
58
59 enable_mmu_secure(0);
60}
61
62uintptr_t plat_get_ns_image_entrypoint(void)
63{
64 return BL33_BASE;
65}
66
67unsigned int plat_get_syscnt_freq2(void)
68{
69 return read_cntfrq_el0();
70}
71
72/* Functions to save and get boot context address given by ROM code */
73static uintptr_t boot_ctx_address;
74
75void stm32mp1_save_boot_ctx_address(uintptr_t address)
76{
77 boot_ctx_address = address;
78}
79
80uintptr_t stm32mp1_get_boot_ctx_address(void)
81{
82 return boot_ctx_address;
83}