Soby Mathew | 61e8d0b | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 1 | /* |
Jeenu Viswambharan | 9cc4fc0 | 2016-08-04 09:43:15 +0100 | [diff] [blame] | 2 | * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | 61e8d0b | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | #include <css_pm.h> |
| 31 | #include <plat_arm.h> |
| 32 | |
| 33 | /* |
| 34 | * Custom `validate_power_state` handler for Juno. According to PSCI |
| 35 | * Specification, interrupts targeted to cores in PSCI CPU SUSPEND should |
| 36 | * be able to resume it. On Juno, when the system power domain is suspended, |
| 37 | * the GIC is also powered down. The SCP resumes the final core to be suspend |
| 38 | * when an external wake-up event is received. But the other cores cannot be |
| 39 | * woken up by a targeted interrupt, because GIC doesn't forward these |
| 40 | * interrupts to the SCP. Due to this hardware limitation, we down-grade PSCI |
| 41 | * CPU SUSPEND requests targeted to the system power domain level |
| 42 | * to cluster power domain level. |
| 43 | * |
| 44 | * The system power domain suspend on Juno is only supported only via |
| 45 | * PSCI SYSTEM SUSPEND API. |
| 46 | */ |
| 47 | static int juno_validate_power_state(unsigned int power_state, |
| 48 | psci_power_state_t *req_state) |
| 49 | { |
| 50 | int rc; |
| 51 | rc = arm_validate_power_state(power_state, req_state); |
| 52 | |
| 53 | /* |
| 54 | * Ensure that the system power domain level is never suspended |
| 55 | * via PSCI CPU SUSPEND API. Currently system suspend is only |
| 56 | * supported via PSCI SYSTEM SUSPEND API. |
| 57 | */ |
| 58 | req_state->pwr_domain_state[ARM_PWR_LVL2] = ARM_LOCAL_STATE_RUN; |
| 59 | return rc; |
| 60 | } |
| 61 | |
Soby Mathew | 421dbc4 | 2016-05-23 16:07:53 +0100 | [diff] [blame] | 62 | /* |
| 63 | * Custom `translate_power_state_by_mpidr` handler for Juno. Unlike in the |
| 64 | * `juno_validate_power_state`, we do not down-grade the system power |
| 65 | * domain level request in `power_state` as it will be used to query the |
| 66 | * PSCI_STAT_COUNT/RESIDENCY at the system power domain level. |
| 67 | */ |
| 68 | static int juno_translate_power_state_by_mpidr(u_register_t mpidr, |
| 69 | unsigned int power_state, |
| 70 | psci_power_state_t *output_state) |
| 71 | { |
| 72 | return arm_validate_power_state(power_state, output_state); |
| 73 | } |
| 74 | |
Soby Mathew | 61e8d0b | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 75 | /******************************************************************************* |
| 76 | * Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard |
| 77 | * platform will take care of registering the handlers with PSCI. |
| 78 | ******************************************************************************/ |
| 79 | const plat_psci_ops_t plat_arm_psci_pm_ops = { |
| 80 | .pwr_domain_on = css_pwr_domain_on, |
| 81 | .pwr_domain_on_finish = css_pwr_domain_on_finish, |
| 82 | .pwr_domain_off = css_pwr_domain_off, |
| 83 | .cpu_standby = css_cpu_standby, |
| 84 | .pwr_domain_suspend = css_pwr_domain_suspend, |
| 85 | .pwr_domain_suspend_finish = css_pwr_domain_suspend_finish, |
| 86 | .system_off = css_system_off, |
| 87 | .system_reset = css_system_reset, |
| 88 | .validate_power_state = juno_validate_power_state, |
| 89 | .validate_ns_entrypoint = arm_validate_ns_entrypoint, |
Soby Mathew | 421dbc4 | 2016-05-23 16:07:53 +0100 | [diff] [blame] | 90 | .get_sys_suspend_power_state = css_get_sys_suspend_power_state, |
Jeenu Viswambharan | 9cc4fc0 | 2016-08-04 09:43:15 +0100 | [diff] [blame] | 91 | .translate_power_state_by_mpidr = juno_translate_power_state_by_mpidr, |
| 92 | .get_node_hw_state = css_node_hw_state |
Soby Mathew | 61e8d0b | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 93 | }; |