Michal Simek | 2a47faa | 2023-04-14 08:43:51 +0200 | [diff] [blame] | 1 | # Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved. |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 2 | # Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. |
Jay Buddhabhatti | 26e138a | 2022-12-21 23:03:35 -0800 | [diff] [blame] | 3 | # Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 4 | # |
| 5 | # SPDX-License-Identifier: BSD-3-Clause |
| 6 | |
| 7 | PLAT_PATH := plat/xilinx/versal_net |
| 8 | |
Akshay Belsare | cbb0c23 | 2022-10-11 15:12:02 +0530 | [diff] [blame] | 9 | # A78 Erratum for SoC |
| 10 | ERRATA_A78_AE_1941500 := 1 |
| 11 | ERRATA_A78_AE_1951502 := 1 |
| 12 | ERRATA_A78_AE_2376748 := 1 |
| 13 | ERRATA_A78_AE_2395408 := 1 |
| 14 | |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 15 | override PROGRAMMABLE_RESET_ADDRESS := 1 |
| 16 | PSCI_EXTENDED_STATE_ID := 1 |
| 17 | SEPARATE_CODE_AND_RODATA := 1 |
| 18 | override RESET_TO_BL31 := 1 |
| 19 | PL011_GENERIC_UART := 1 |
Prasad Kummari | 4837d74 | 2023-05-15 11:03:37 +0530 | [diff] [blame] | 20 | IPI_CRC_CHECK := 0 |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 21 | GIC_ENABLE_V4_EXTN := 0 |
| 22 | GICV3_SUPPORT_GIC600 := 1 |
Jay Buddhabhatti | c6daff0 | 2022-09-05 02:56:32 -0700 | [diff] [blame] | 23 | TFA_NO_PM := 0 |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 24 | |
| 25 | override CTX_INCLUDE_AARCH32_REGS := 0 |
| 26 | |
Jay Buddhabhatti | c6daff0 | 2022-09-05 02:56:32 -0700 | [diff] [blame] | 27 | ifdef TFA_NO_PM |
| 28 | $(eval $(call add_define,TFA_NO_PM)) |
| 29 | endif |
| 30 | |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 31 | ifdef VERSAL_NET_ATF_MEM_BASE |
| 32 | $(eval $(call add_define,VERSAL_NET_ATF_MEM_BASE)) |
| 33 | |
| 34 | ifndef VERSAL_NET_ATF_MEM_SIZE |
| 35 | $(error "VERSAL_NET_ATF_BASE defined without VERSAL_NET_ATF_SIZE") |
| 36 | endif |
| 37 | $(eval $(call add_define,VERSAL_NET_ATF_MEM_SIZE)) |
| 38 | |
| 39 | ifdef VERSAL_NET_ATF_MEM_PROGBITS_SIZE |
| 40 | $(eval $(call add_define,VERSAL_NET_ATF_MEM_PROGBITS_SIZE)) |
| 41 | endif |
| 42 | endif |
| 43 | |
| 44 | ifdef VERSAL_NET_BL32_MEM_BASE |
| 45 | $(eval $(call add_define,VERSAL_NET_BL32_MEM_BASE)) |
| 46 | |
| 47 | ifndef VERSAL_NET_BL32_MEM_SIZE |
| 48 | $(error "VERSAL_NET_BL32_BASE defined without VERSAL_NET_BL32_SIZE") |
| 49 | endif |
| 50 | $(eval $(call add_define,VERSAL_NET_BL32_MEM_SIZE)) |
| 51 | endif |
| 52 | |
Prasad Kummari | 4837d74 | 2023-05-15 11:03:37 +0530 | [diff] [blame] | 53 | ifdef IPI_CRC_CHECK |
| 54 | $(eval $(call add_define,IPI_CRC_CHECK)) |
| 55 | endif |
| 56 | |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 57 | USE_COHERENT_MEM := 0 |
| 58 | HW_ASSISTED_COHERENCY := 1 |
| 59 | |
| 60 | VERSAL_NET_CONSOLE ?= pl011 |
Akshay Belsare | 50a2968 | 2023-01-18 15:54:12 +0530 | [diff] [blame] | 61 | ifeq (${VERSAL_NET_CONSOLE}, $(filter ${VERSAL_NET_CONSOLE},pl011 pl011_0 pl011_1 dcc)) |
Akshay Belsare | 0babc5f | 2023-01-13 14:40:37 +0530 | [diff] [blame] | 62 | else |
| 63 | $(error Please define VERSAL_NET_CONSOLE) |
| 64 | endif |
| 65 | |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 66 | $(eval $(call add_define_val,VERSAL_NET_CONSOLE,VERSAL_NET_CONSOLE_ID_${VERSAL_NET_CONSOLE})) |
| 67 | |
Amit Nagal | efefcd4 | 2023-07-10 10:43:29 +0530 | [diff] [blame] | 68 | ifdef XILINX_OF_BOARD_DTB_ADDR |
| 69 | $(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR)) |
| 70 | endif |
| 71 | |
Amit Nagal | 82d0e0f | 2023-10-30 12:25:49 +0530 | [diff] [blame] | 72 | # enable assert() for release/debug builds |
| 73 | ENABLE_ASSERTIONS := 1 |
| 74 | |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 75 | PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ |
| 76 | -Iplat/xilinx/common/include/ \ |
Michal Simek | aa5443e | 2022-09-19 14:04:55 +0200 | [diff] [blame] | 77 | -Iplat/xilinx/common/ipi_mailbox_service/ \ |
Michal Simek | dc708ac | 2022-09-19 13:52:54 +0200 | [diff] [blame] | 78 | -I${PLAT_PATH}/include/ \ |
| 79 | -Iplat/xilinx/versal/pm_service/ |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 80 | |
| 81 | # Include GICv3 driver files |
| 82 | include drivers/arm/gic/v3/gicv3.mk |
| 83 | include lib/xlat_tables_v2/xlat_tables.mk |
| 84 | include lib/libfdt/libfdt.mk |
| 85 | |
| 86 | PLAT_BL_COMMON_SOURCES := \ |
Akshay Belsare | 50a2968 | 2023-01-18 15:54:12 +0530 | [diff] [blame] | 87 | drivers/arm/dcc/dcc_console.c \ |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 88 | drivers/delay_timer/delay_timer.c \ |
| 89 | drivers/delay_timer/generic_delay_timer.c \ |
| 90 | ${GICV3_SOURCES} \ |
| 91 | drivers/arm/pl011/aarch64/pl011_console.S \ |
Michal Simek | 23551e8 | 2023-09-18 10:14:10 +0200 | [diff] [blame] | 92 | plat/common/aarch64/crash_console_helpers.S \ |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 93 | plat/arm/common/arm_common.c \ |
| 94 | plat/common/plat_gicv3.c \ |
| 95 | ${PLAT_PATH}/aarch64/versal_net_helpers.S \ |
Akshay Belsare | a103aa7 | 2023-11-08 14:27:22 +0530 | [diff] [blame] | 96 | ${PLAT_PATH}/aarch64/versal_net_common.c \ |
| 97 | ${PLAT_PATH}/plat_topology.c \ |
| 98 | ${XLAT_TABLES_LIB_SRCS} |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 99 | |
| 100 | BL31_SOURCES += drivers/arm/cci/cci.c \ |
| 101 | lib/cpus/aarch64/cortex_a78_ae.S \ |
| 102 | lib/cpus/aarch64/cortex_a78.S \ |
Jay Buddhabhatti | c6daff0 | 2022-09-05 02:56:32 -0700 | [diff] [blame] | 103 | plat/common/plat_psci_common.c |
| 104 | ifeq ($(TFA_NO_PM), 0) |
Jay Buddhabhatti | 26e138a | 2022-12-21 23:03:35 -0800 | [diff] [blame] | 105 | BL31_SOURCES += plat/xilinx/common/pm_service/pm_api_sys.c \ |
Jay Buddhabhatti | c6daff0 | 2022-09-05 02:56:32 -0700 | [diff] [blame] | 106 | plat/xilinx/common/pm_service/pm_ipi.c \ |
| 107 | ${PLAT_PATH}/plat_psci_pm.c \ |
Jay Buddhabhatti | 26e138a | 2022-12-21 23:03:35 -0800 | [diff] [blame] | 108 | plat/xilinx/common/pm_service/pm_svc_main.c \ |
Jay Buddhabhatti | c6daff0 | 2022-09-05 02:56:32 -0700 | [diff] [blame] | 109 | ${PLAT_PATH}/pm_service/pm_client.c \ |
| 110 | ${PLAT_PATH}/versal_net_ipi.c |
| 111 | else |
| 112 | BL31_SOURCES += ${PLAT_PATH}/plat_psci.c |
| 113 | endif |
Amit Nagal | efefcd4 | 2023-07-10 10:43:29 +0530 | [diff] [blame] | 114 | BL31_SOURCES += plat/xilinx/common/plat_fdt.c \ |
| 115 | plat/xilinx/common/plat_startup.c \ |
Prasad Kummari | a8e5a58 | 2023-09-20 10:12:41 +0530 | [diff] [blame] | 116 | plat/xilinx/common/plat_console.c \ |
Prasad Kummari | 2eb2279 | 2023-12-20 16:15:03 +0530 | [diff] [blame] | 117 | plat/xilinx/common/plat_clkfunc.c \ |
Michal Simek | aa5443e | 2022-09-19 14:04:55 +0200 | [diff] [blame] | 118 | plat/xilinx/common/ipi.c \ |
| 119 | plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ |
Akshay Belsare | ff8e19b | 2023-04-03 16:18:00 +0530 | [diff] [blame] | 120 | plat/xilinx/common/versal.c \ |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 121 | ${PLAT_PATH}/bl31_versal_net_setup.c \ |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 122 | common/fdt_fixup.c \ |
Prasad Kummari | a8e5a58 | 2023-09-20 10:12:41 +0530 | [diff] [blame] | 123 | common/fdt_wrappers.c \ |
Jay Buddhabhatti | b7bb1ed | 2023-10-05 21:55:28 -0700 | [diff] [blame] | 124 | plat/arm/common/arm_gicv3.c \ |
Michal Simek | 9179436 | 2022-08-31 16:45:14 +0200 | [diff] [blame] | 125 | ${LIBFDT_SRCS} \ |
| 126 | ${PLAT_PATH}/sip_svc_setup.c \ |
Jay Buddhabhatti | b7bb1ed | 2023-10-05 21:55:28 -0700 | [diff] [blame] | 127 | ${XLAT_TABLES_LIB_SRCS} |