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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
dp-arm66abfbe2017-01-31 13:01:04 +00002 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __PSCI_PRIVATE_H__
32#define __PSCI_PRIVATE_H__
33
Achin Guptaa59caa42013-12-05 14:21:04 +000034#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010035#include <bakery_lock.h>
Soby Mathew8595b872015-01-06 15:36:38 +000036#include <bl_common.h>
Soby Mathew981487a2015-07-13 14:10:57 +010037#include <cpu_data.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010038#include <psci.h>
Soby Mathew981487a2015-07-13 14:10:57 +010039#include <spinlock.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010040
Soby Mathew523d6332015-01-08 18:02:19 +000041/*
42 * The following helper macros abstract the interface to the Bakery
43 * Lock API.
44 */
Soby Mathew981487a2015-07-13 14:10:57 +010045#define psci_lock_init(non_cpu_pd_node, idx) \
46 ((non_cpu_pd_node)[(idx)].lock_index = (idx))
47#define psci_lock_get(non_cpu_pd_node) \
Andrew Thoelkee466c9f2015-09-10 11:39:36 +010048 bakery_lock_get(&psci_locks[(non_cpu_pd_node)->lock_index])
Soby Mathew981487a2015-07-13 14:10:57 +010049#define psci_lock_release(non_cpu_pd_node) \
Andrew Thoelkee466c9f2015-09-10 11:39:36 +010050 bakery_lock_release(&psci_locks[(non_cpu_pd_node)->lock_index])
Andrew Thoelke56f44702014-06-20 00:36:14 +010051
Soby Mathew6cdddaf2015-01-07 11:10:22 +000052/*
53 * The PSCI capability which are provided by the generic code but does not
54 * depend on the platform or spd capabilities.
55 */
56#define PSCI_GENERIC_CAP \
57 (define_psci_cap(PSCI_VERSION) | \
58 define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
59 define_psci_cap(PSCI_FEATURES))
60
61/*
62 * The PSCI capabilities mask for 64 bit functions.
63 */
64#define PSCI_CAP_64BIT_MASK \
65 (define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) | \
66 define_psci_cap(PSCI_CPU_ON_AARCH64) | \
67 define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \
68 define_psci_cap(PSCI_MIG_AARCH64) | \
Soby Mathew96168382014-12-17 14:47:57 +000069 define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) | \
Jeenu Viswambharan7f03e9d92016-08-03 15:54:50 +010070 define_psci_cap(PSCI_NODE_HW_STATE_AARCH64) | \
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010071 define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64) | \
72 define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64) | \
73 define_psci_cap(PSCI_STAT_COUNT_AARCH64))
Soby Mathew6cdddaf2015-01-07 11:10:22 +000074
Soby Mathew981487a2015-07-13 14:10:57 +010075/*
76 * Helper macros to get/set the fields of PSCI per-cpu data.
77 */
78#define psci_set_aff_info_state(aff_state) \
79 set_cpu_data(psci_svc_cpu_data.aff_info_state, aff_state)
80#define psci_get_aff_info_state() \
81 get_cpu_data(psci_svc_cpu_data.aff_info_state)
82#define psci_get_aff_info_state_by_idx(idx) \
83 get_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state)
Soby Mathewca370502016-01-26 11:47:53 +000084#define psci_set_aff_info_state_by_idx(idx, aff_state) \
85 set_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state,\
86 aff_state)
Soby Mathew981487a2015-07-13 14:10:57 +010087#define psci_get_suspend_pwrlvl() \
88 get_cpu_data(psci_svc_cpu_data.target_pwrlvl)
89#define psci_set_suspend_pwrlvl(target_lvl) \
90 set_cpu_data(psci_svc_cpu_data.target_pwrlvl, target_lvl)
91#define psci_set_cpu_local_state(state) \
92 set_cpu_data(psci_svc_cpu_data.local_state, state)
93#define psci_get_cpu_local_state() \
94 get_cpu_data(psci_svc_cpu_data.local_state)
95#define psci_get_cpu_local_state_by_idx(idx) \
96 get_cpu_data_by_index(idx, psci_svc_cpu_data.local_state)
97
98/*
99 * Helper macros for the CPU level spinlocks
100 */
101#define psci_spin_lock_cpu(idx) spin_lock(&psci_cpu_pd_nodes[idx].cpu_lock)
102#define psci_spin_unlock_cpu(idx) spin_unlock(&psci_cpu_pd_nodes[idx].cpu_lock)
103
104/* Helper macro to identify a CPU standby request in PSCI Suspend call */
105#define is_cpu_standby_req(is_power_down_state, retn_lvl) \
106 (((!(is_power_down_state)) && ((retn_lvl) == 0)) ? 1 : 0)
Soby Mathew6cdddaf2015-01-07 11:10:22 +0000107
Achin Gupta4f6ad662013-10-25 09:08:21 +0100108/*******************************************************************************
Soby Mathew981487a2015-07-13 14:10:57 +0100109 * The following two data structures implement the power domain tree. The tree
110 * is used to track the state of all the nodes i.e. power domain instances
111 * described by the platform. The tree consists of nodes that describe CPU power
112 * domains i.e. leaf nodes and all other power domains which are parents of a
113 * CPU power domain i.e. non-leaf nodes.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100114 ******************************************************************************/
Soby Mathew981487a2015-07-13 14:10:57 +0100115typedef struct non_cpu_pwr_domain_node {
116 /*
117 * Index of the first CPU power domain node level 0 which has this node
118 * as its parent.
119 */
120 unsigned int cpu_start_idx;
121
122 /*
123 * Number of CPU power domains which are siblings of the domain indexed
124 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
125 * -> cpu_start_idx + ncpus' have this node as their parent.
126 */
127 unsigned int ncpus;
128
129 /*
130 * Index of the parent power domain node.
131 * TODO: Figure out whether to whether using pointer is more efficient.
132 */
133 unsigned int parent_node;
134
135 plat_local_state_t local_state;
136
Achin Gupta75f73672013-12-05 16:33:10 +0000137 unsigned char level;
Andrew Thoelkee466c9f2015-09-10 11:39:36 +0100138
139 /* For indexing the psci_lock array*/
Soby Mathew981487a2015-07-13 14:10:57 +0100140 unsigned char lock_index;
Soby Mathew981487a2015-07-13 14:10:57 +0100141} non_cpu_pd_node_t;
142
143typedef struct cpu_pwr_domain_node {
Soby Mathew011ca182015-07-29 17:05:03 +0100144 u_register_t mpidr;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100145
Soby Mathew981487a2015-07-13 14:10:57 +0100146 /*
147 * Index of the parent power domain node.
148 * TODO: Figure out whether to whether using pointer is more efficient.
149 */
150 unsigned int parent_node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100151
Soby Mathew981487a2015-07-13 14:10:57 +0100152 /*
153 * A CPU power domain does not require state coordination like its
154 * parent power domains. Hence this node does not include a bakery
155 * lock. A spinlock is required by the CPU_ON handler to prevent a race
156 * when multiple CPUs try to turn ON the same target CPU.
157 */
158 spinlock_t cpu_lock;
159} cpu_pd_node_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100160
161/*******************************************************************************
162 * Data prototypes
163 ******************************************************************************/
Soby Mathew981487a2015-07-13 14:10:57 +0100164extern const plat_psci_ops_t *psci_plat_pm_ops;
165extern non_cpu_pd_node_t psci_non_cpu_pd_nodes[PSCI_NUM_NON_CPU_PWR_DOMAINS];
166extern cpu_pd_node_t psci_cpu_pd_nodes[PLATFORM_CORE_COUNT];
Soby Mathew011ca182015-07-29 17:05:03 +0100167extern unsigned int psci_caps;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100168
Andrew Thoelkee466c9f2015-09-10 11:39:36 +0100169/* One bakery lock is required for each non-cpu power domain */
170DECLARE_BAKERY_LOCK(psci_locks[PSCI_NUM_NON_CPU_PWR_DOMAINS]);
171
Achin Gupta4f6ad662013-10-25 09:08:21 +0100172/*******************************************************************************
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000173 * SPD's power management hooks registered with PSCI
Achin Gupta607084e2014-02-09 18:24:19 +0000174 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100175extern const spd_pm_ops_t *psci_spd_pm;
Achin Gupta607084e2014-02-09 18:24:19 +0000176
177/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100178 * Function prototypes
179 ******************************************************************************/
180/* Private exported functions from psci_common.c */
Soby Mathew981487a2015-07-13 14:10:57 +0100181int psci_validate_power_state(unsigned int power_state,
182 psci_power_state_t *state_info);
183void psci_query_sys_suspend_pwrstate(psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100184int psci_validate_mpidr(u_register_t mpidr);
Soby Mathew981487a2015-07-13 14:10:57 +0100185void psci_init_req_local_pwr_states(void);
Achin Gupta9b2bf252016-06-28 16:46:15 +0100186void psci_get_target_local_pwr_states(unsigned int end_pwrlvl,
187 psci_power_state_t *target_state);
Soby Mathewf1f97a12015-07-15 12:13:26 +0100188int psci_validate_entry_point(entry_point_info_t *ep,
Soby Mathew011ca182015-07-29 17:05:03 +0100189 uintptr_t entrypoint, u_register_t context_id);
Soby Mathew981487a2015-07-13 14:10:57 +0100190void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
Soby Mathew011ca182015-07-29 17:05:03 +0100191 unsigned int end_lvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100192 unsigned int node_index[]);
Soby Mathew011ca182015-07-29 17:05:03 +0100193void psci_do_state_coordination(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100194 psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100195void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100196 unsigned int cpu_idx);
Soby Mathew011ca182015-07-29 17:05:03 +0100197void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100198 unsigned int cpu_idx);
199int psci_validate_suspend_req(const psci_power_state_t *state_info,
200 unsigned int is_power_down_state_req);
201unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
202unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
Soby Mathew011ca182015-07-29 17:05:03 +0100203void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
Soby Mathew981487a2015-07-13 14:10:57 +0100204void psci_print_power_domain_map(void);
Soby Mathew96168382014-12-17 14:47:57 +0000205unsigned int psci_is_last_on_cpu(void);
Soby Mathew011ca182015-07-29 17:05:03 +0100206int psci_spd_migrate_info(u_register_t *mpidr);
Achin Gupta0959db52013-12-02 17:33:04 +0000207
Soby Mathew981487a2015-07-13 14:10:57 +0100208/* Private exported functions from psci_on.c */
Soby Mathewa0fedc42016-06-16 14:52:04 +0100209int psci_cpu_on_start(u_register_t target_cpu,
Sandrine Bailleux7497bff2016-04-25 09:28:43 +0100210 entry_point_info_t *ep);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100211
Soby Mathew981487a2015-07-13 14:10:57 +0100212void psci_cpu_on_finish(unsigned int cpu_idx,
213 psci_power_state_t *state_info);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100214
Sandrine Bailleuxf4119ec2015-12-17 13:58:58 +0000215/* Private exported functions from psci_off.c */
Soby Mathew011ca182015-07-29 17:05:03 +0100216int psci_do_cpu_off(unsigned int end_pwrlvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100217
Sandrine Bailleuxf4119ec2015-12-17 13:58:58 +0000218/* Private exported functions from psci_suspend.c */
Soby Mathew981487a2015-07-13 14:10:57 +0100219void psci_cpu_suspend_start(entry_point_info_t *ep,
Soby Mathew011ca182015-07-29 17:05:03 +0100220 unsigned int end_pwrlvl,
Soby Mathew981487a2015-07-13 14:10:57 +0100221 psci_power_state_t *state_info,
222 unsigned int is_power_down_state_req);
Soby Mathew8595b872015-01-06 15:36:38 +0000223
Soby Mathew981487a2015-07-13 14:10:57 +0100224void psci_cpu_suspend_finish(unsigned int cpu_idx,
225 psci_power_state_t *state_info);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000226
Achin Guptae1aa5162014-06-26 09:58:52 +0100227/* Private exported functions from psci_helpers.S */
Soby Mathew011ca182015-07-29 17:05:03 +0100228void psci_do_pwrdown_cache_maintenance(unsigned int pwr_level);
Achin Guptae1aa5162014-06-26 09:58:52 +0100229void psci_do_pwrup_cache_maintenance(void);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100230
Juan Castillo4dc4a472014-08-12 11:17:06 +0100231/* Private exported functions from psci_system_off.c */
232void __dead2 psci_system_off(void);
233void __dead2 psci_system_reset(void);
234
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100235/* Private exported functions from psci_stat.c */
236void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
237 const psci_power_state_t *state_info);
238void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
dp-arm66abfbe2017-01-31 13:01:04 +0000239 const psci_power_state_t *state_info);
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100240u_register_t psci_stat_residency(u_register_t target_cpu,
241 unsigned int power_state);
242u_register_t psci_stat_count(u_register_t target_cpu,
243 unsigned int power_state);
244
Achin Gupta4f6ad662013-10-25 09:08:21 +0100245#endif /* __PSCI_PRIVATE_H__ */