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Dan Handley9df48042015-03-19 18:58:55 +00001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
Soby Mathew0d9e8522015-07-15 13:36:24 +010032#include <arm_def.h>
Dan Handley9df48042015-03-19 18:58:55 +000033#include <assert.h>
34#include <errno.h>
Soby Mathew7799cf72015-04-16 14:49:09 +010035#include <plat_arm.h>
Dan Handley9df48042015-03-19 18:58:55 +000036#include <psci.h>
37
Soby Mathew7799cf72015-04-16 14:49:09 +010038#if ARM_RECOM_STATE_ID_ENC
39extern unsigned int arm_pm_idle_states[];
40#endif /* __ARM_RECOM_STATE_ID_ENC__ */
41
42
43#if !ARM_RECOM_STATE_ID_ENC
Dan Handley9df48042015-03-19 18:58:55 +000044/*******************************************************************************
Soby Mathewfec4eb72015-07-01 16:16:20 +010045 * ARM standard platform handler called to check the validity of the power state
46 * parameter.
Dan Handley9df48042015-03-19 18:58:55 +000047 ******************************************************************************/
Soby Mathewfec4eb72015-07-01 16:16:20 +010048int arm_validate_power_state(unsigned int power_state,
49 psci_power_state_t *req_state)
Dan Handley9df48042015-03-19 18:58:55 +000050{
Soby Mathewfec4eb72015-07-01 16:16:20 +010051 int pstate = psci_get_pstate_type(power_state);
52 int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
53 int i;
Dan Handley9df48042015-03-19 18:58:55 +000054
Soby Mathewfec4eb72015-07-01 16:16:20 +010055 assert(req_state);
Dan Handley9df48042015-03-19 18:58:55 +000056
Soby Mathewfec4eb72015-07-01 16:16:20 +010057 if (pwr_lvl > PLAT_MAX_PWR_LVL)
58 return PSCI_E_INVALID_PARAMS;
Dan Handley9df48042015-03-19 18:58:55 +000059
Dan Handley9df48042015-03-19 18:58:55 +000060 /* Sanity check the requested state */
Soby Mathewfec4eb72015-07-01 16:16:20 +010061 if (pstate == PSTATE_TYPE_STANDBY) {
Dan Handley9df48042015-03-19 18:58:55 +000062 /*
Soby Mathewfec4eb72015-07-01 16:16:20 +010063 * It's possible to enter standby only on power level 0
64 * Ignore any other power level.
Dan Handley9df48042015-03-19 18:58:55 +000065 */
Soby Mathewfec4eb72015-07-01 16:16:20 +010066 if (pwr_lvl != ARM_PWR_LVL0)
Dan Handley9df48042015-03-19 18:58:55 +000067 return PSCI_E_INVALID_PARAMS;
Soby Mathewfec4eb72015-07-01 16:16:20 +010068
69 req_state->pwr_domain_state[ARM_PWR_LVL0] =
70 ARM_LOCAL_STATE_RET;
71 } else {
72 for (i = ARM_PWR_LVL0; i <= pwr_lvl; i++)
73 req_state->pwr_domain_state[i] =
74 ARM_LOCAL_STATE_OFF;
Dan Handley9df48042015-03-19 18:58:55 +000075 }
76
77 /*
78 * We expect the 'state id' to be zero.
79 */
80 if (psci_get_pstate_id(power_state))
81 return PSCI_E_INVALID_PARAMS;
82
Soby Mathew7799cf72015-04-16 14:49:09 +010083 return PSCI_E_SUCCESS;
84}
85
86#else
87/*******************************************************************************
88 * ARM standard platform handler called to check the validity of the power
89 * state parameter. The power state parameter has to be a composite power
90 * state.
91 ******************************************************************************/
92int arm_validate_power_state(unsigned int power_state,
93 psci_power_state_t *req_state)
94{
95 unsigned int state_id;
96 int i;
97
98 assert(req_state);
99
100 /*
101 * Currently we are using a linear search for finding the matching
102 * entry in the idle power state array. This can be made a binary
103 * search if the number of entries justify the additional complexity.
104 */
105 for (i = 0; !!arm_pm_idle_states[i]; i++) {
106 if (power_state == arm_pm_idle_states[i])
107 break;
108 }
109
110 /* Return error if entry not found in the idle state array */
111 if (!arm_pm_idle_states[i])
112 return PSCI_E_INVALID_PARAMS;
113
114 i = 0;
115 state_id = psci_get_pstate_id(power_state);
116
117 /* Parse the State ID and populate the state info parameter */
118 while (state_id) {
119 req_state->pwr_domain_state[i++] = state_id &
120 ARM_LOCAL_PSTATE_MASK;
121 state_id >>= ARM_LOCAL_PSTATE_WIDTH;
122 }
123
Dan Handley9df48042015-03-19 18:58:55 +0000124 return PSCI_E_SUCCESS;
125}
Soby Mathew7799cf72015-04-16 14:49:09 +0100126#endif /* __ARM_RECOM_STATE_ID_ENC__ */
Soby Mathew0d9e8522015-07-15 13:36:24 +0100127
128/*******************************************************************************
129 * ARM standard platform handler called to check the validity of the non secure
130 * entrypoint.
131 ******************************************************************************/
132int arm_validate_ns_entrypoint(uintptr_t entrypoint)
133{
134 /*
135 * Check if the non secure entrypoint lies within the non
136 * secure DRAM.
137 */
138 if ((entrypoint >= ARM_NS_DRAM1_BASE) && (entrypoint <
139 (ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE)))
140 return PSCI_E_SUCCESS;
141 if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint <
142 (ARM_DRAM2_BASE + ARM_DRAM2_SIZE)))
143 return PSCI_E_SUCCESS;
144
145 return PSCI_E_INVALID_ADDRESS;
146}