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Antonio Nino Diaz493bf332016-12-14 14:31:32 +00001#
Michal Simek2a47faa2023-04-14 08:43:51 +02002# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
Jeremie Corbier9e1873f2021-09-07 11:49:58 +02003# Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
Akshay Belsareec0afc82023-02-27 12:04:26 +05304# Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
Prasad Kummarie48b6d82024-03-19 18:42:23 -12005# Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08006#
dp-armfa3cf0b2017-05-03 09:38:09 +01007# SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08008
Soren Brinkmannba8309d2017-04-06 11:44:27 -07009override ERRATA_A53_855873 := 1
Michal Simek81ec0d12023-02-09 13:21:10 +010010ERRATA_A53_1530924 := 1
Masahiro Yamada8cf895c2016-12-19 17:41:47 +090011override PROGRAMMABLE_RESET_ADDRESS := 1
Soren Brinkmann76fcae32016-03-06 20:16:27 -080012PSCI_EXTENDED_STATE_ID := 1
13A53_DISABLE_NON_TEMPORAL_HINT := 0
Soren Brinkmann6d1ba582016-07-08 14:45:14 -070014SEPARATE_CODE_AND_RODATA := 1
Siva Durga Prasad Paladuguefd431b2018-04-30 20:12:12 +053015ZYNQMP_WDT_RESTART := 0
Venkatesh Yadav Abbarapubfa2a2a2021-02-19 01:40:14 -070016IPI_CRC_CHECK := 0
Masahiro Yamada8cf895c2016-12-19 17:41:47 +090017override RESET_TO_BL31 := 1
Siva Durga Prasad Paladugu60bfbc92018-09-24 22:51:49 -070018override WARMBOOT_ENABLE_DCACHE_EARLY := 1
Prasad Kummarie48b6d82024-03-19 18:42:23 -120019ENABLE_LTO := 1
Soren Brinkmann76fcae32016-03-06 20:16:27 -080020
Jan Kiszkae1407fc2020-07-14 22:36:59 +020021EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
22
Jeremie Corbier9e1873f2021-09-07 11:49:58 +020023# pncd SPD requires secure SGI to be handled at EL1
Shen Jiamin63e20072024-07-24 18:58:55 +080024ifeq (${SPD}, $(filter ${SPD},pncd tspd opteed))
Jeremie Corbier9e1873f2021-09-07 11:49:58 +020025ifeq (${ZYNQMP_WDT_RESTART},1)
26$(error "Error: ZYNQMP_WDT_RESTART and SPD=pncd are incompatible")
27endif
28override GICV2_G0_FOR_EL3 := 0
29else
30override GICV2_G0_FOR_EL3 := 1
31endif
32
David Cunadoc5b0c0f2017-10-31 23:19:21 +000033# Do not enable SVE
34ENABLE_SVE_FOR_NS := 0
35
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +000036WORKAROUND_CVE_2017_5715 := 0
37
Soren Brinkmann4a9ca042016-04-14 10:27:00 -070038ifdef ZYNQMP_ATF_MEM_BASE
39 $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
40
41 ifndef ZYNQMP_ATF_MEM_SIZE
Michal Simeka7178ca2024-08-02 13:19:23 +020042 $(error "ZYNQMP_ATF_MEM_BASE defined without ZYNQMP_ATF_MEM_SIZE")
Soren Brinkmann4a9ca042016-04-14 10:27:00 -070043 endif
44 $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
Soren Brinkmann76fcae32016-03-06 20:16:27 -080045
Soren Brinkmann4a9ca042016-04-14 10:27:00 -070046 ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE
47 $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE))
48 endif
Amit Nagal326576d2023-10-31 10:15:22 +053049
50 # enable assert() when TF-A runs from DDR memory.
51 ENABLE_ASSERTIONS := 1
52
Soren Brinkmann76fcae32016-03-06 20:16:27 -080053endif
54
Soren Brinkmann4a9ca042016-04-14 10:27:00 -070055ifdef ZYNQMP_BL32_MEM_BASE
56 $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
57
58 ifndef ZYNQMP_BL32_MEM_SIZE
Michal Simeka7178ca2024-08-02 13:19:23 +020059 $(error "ZYNQMP_BL32_MEM_BASE defined without ZYNQMP_BL32_MEM_SIZE")
Soren Brinkmann4a9ca042016-04-14 10:27:00 -070060 endif
61 $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
62endif
Soren Brinkmann76fcae32016-03-06 20:16:27 -080063
Soren Brinkmann99c0d7b2016-06-10 09:57:14 -070064
Siva Durga Prasad Paladuguefd431b2018-04-30 20:12:12 +053065ifdef ZYNQMP_WDT_RESTART
Michal Simek08341b72022-03-09 08:53:20 +010066 $(eval $(call add_define,ZYNQMP_WDT_RESTART))
Siva Durga Prasad Paladuguefd431b2018-04-30 20:12:12 +053067endif
68
Venkatesh Yadav Abbarapu35a8be92019-04-04 14:23:32 +053069ifdef ZYNQMP_IPI_CRC_CHECK
Michal Simek08341b72022-03-09 08:53:20 +010070 $(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.")
Venkatesh Yadav Abbarapubfa2a2a2021-02-19 01:40:14 -070071endif
72
73ifdef IPI_CRC_CHECK
74 $(eval $(call add_define,IPI_CRC_CHECK))
Venkatesh Yadav Abbarapu35a8be92019-04-04 14:23:32 +053075endif
76
Vesa Jääskeläinen28f9ce52022-04-29 08:47:24 +030077ifdef ZYNQMP_SECURE_EFUSES
78 $(eval $(call add_define,ZYNQMP_SECURE_EFUSES))
79endif
80
Akshay Belsareec0afc82023-02-27 12:04:26 +053081ifdef XILINX_OF_BOARD_DTB_ADDR
82$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
83endif
84
Venkatesh Yadav Abbarapu35a8be92019-04-04 14:23:32 +053085PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
86 -Iinclude/plat/arm/common/aarch64/ \
Jolly Shahb07fd0c2019-01-08 11:25:28 -080087 -Iplat/xilinx/common/include/ \
Wendy Liangc31c48b2019-01-21 13:45:48 +053088 -Iplat/xilinx/common/ipi_mailbox_service/ \
Soren Brinkmann76fcae32016-03-06 20:16:27 -080089 -Iplat/xilinx/zynqmp/include/ \
Wendy Liangf8fec362017-09-06 09:39:55 -070090 -Iplat/xilinx/zynqmp/pm_service/ \
Soren Brinkmann76fcae32016-03-06 20:16:27 -080091
Michal Simek53865b02021-05-27 09:42:37 +020092include lib/libfdt/libfdt.mk
Venkatesh Yadav Abbarapu1ad5f662020-12-03 20:27:18 -070093# Include GICv2 driver files
94include drivers/arm/gic/v2/gicv2.mk
Prasad Kummari22584d62024-03-19 18:42:24 -120095include lib/xlat_tables_v2/xlat_tables.mk
Venkatesh Yadav Abbarapu1ad5f662020-12-03 20:27:18 -070096
Prasad Kummari22584d62024-03-19 18:42:24 -120097PLAT_BL_COMMON_SOURCES := drivers/arm/dcc/dcc_console.c \
Soren Brinkmanne5bdcaa2016-06-22 09:02:56 -070098 drivers/delay_timer/delay_timer.c \
99 drivers/delay_timer/generic_delay_timer.c \
Venkatesh Yadav Abbarapu1ad5f662020-12-03 20:27:18 -0700100 ${GICV2_SOURCES} \
Soby Mathew17231132016-08-08 12:33:06 +0100101 drivers/cadence/uart/aarch64/cdns_console.S \
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800102 plat/arm/common/arm_cci.c \
Soby Mathew0eb965b2016-07-07 08:45:56 +0100103 plat/arm/common/arm_common.c \
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800104 plat/arm/common/arm_gicv2.c \
105 plat/common/plat_gicv2.c \
Jolly Shahc2583ab2019-01-08 11:31:49 -0800106 plat/xilinx/common/ipi.c \
Venkatesh Yadav Abbarapu44e563a2021-01-23 22:16:47 -0700107 plat/xilinx/zynqmp/zynqmp_ipi.c \
108 plat/common/aarch64/crash_console_helpers.S \
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800109 plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \
Prasad Kummari22584d62024-03-19 18:42:24 -1200110 plat/xilinx/zynqmp/aarch64/zynqmp_common.c \
111 ${XLAT_TABLES_LIB_SRCS}
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800112
Venkatesh Yadav Abbarapu34fbf1f2020-11-27 04:45:01 -0700113ZYNQMP_CONSOLE ?= cadence
Michal Simekb954eb42024-09-10 15:55:04 +0200114ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc dtb none))
Venkatesh Yadav Abbarapu34fbf1f2020-11-27 04:45:01 -0700115else
116 $(error "Please define ZYNQMP_CONSOLE")
117endif
118$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE}))
119
Prasad Kummari80232f72024-03-14 15:19:10 +0530120# Runtime console in default console in DEBUG build
121ifeq ($(DEBUG), 1)
122CONSOLE_RUNTIME ?= cadence
123endif
124
125# Runtime console
126ifdef CONSOLE_RUNTIME
127ifeq (${CONSOLE_RUNTIME}, $(filter ${CONSOLE_RUNTIME},cadence cadence0 cadence1 dcc dtb))
128$(eval $(call add_define_val,CONSOLE_RUNTIME,RT_CONSOLE_ID_${CONSOLE_RUNTIME}))
129else
130$(error "Please define CONSOLE_RUNTIME")
131endif
132endif
133
Amit Nagal20f7afc2023-03-23 14:16:01 +0530134# Build PM code as a Library
135include plat/xilinx/zynqmp/libpm.mk
136
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800137BL31_SOURCES += drivers/arm/cci/cci.c \
138 lib/cpus/aarch64/aem_generic.S \
139 lib/cpus/aarch64/cortex_a53.S \
Soby Mathewf6c41082016-05-03 12:31:18 +0100140 plat/common/plat_psci_common.c \
Michal Simek53865b02021-05-27 09:42:37 +0200141 common/fdt_fixup.c \
Prasad Kummarib72494e2023-09-19 22:15:05 +0530142 common/fdt_wrappers.c \
Michal Simek53865b02021-05-27 09:42:37 +0200143 ${LIBFDT_SRCS} \
Wendy Liangc31c48b2019-01-21 13:45:48 +0530144 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
Venkatesh Yadav Abbarapu1463dd52020-01-07 03:25:16 -0700145 plat/xilinx/common/plat_startup.c \
Prasad Kummarib72494e2023-09-19 22:15:05 +0530146 plat/xilinx/common/plat_console.c \
Amit Nagalf7c85f82023-09-27 15:13:42 +0530147 plat/xilinx/common/plat_fdt.c \
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800148 plat/xilinx/zynqmp/bl31_zynqmp_setup.c \
149 plat/xilinx/zynqmp/plat_psci.c \
150 plat/xilinx/zynqmp/plat_zynqmp.c \
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800151 plat/xilinx/zynqmp/plat_topology.c \
Amit Nagal20f7afc2023-03-23 14:16:01 +0530152 plat/xilinx/zynqmp/sip_svc_setup.c
Wendy Liangc31c48b2019-01-21 13:45:48 +0530153
Jan Kiszkae1407fc2020-07-14 22:36:59 +0200154ifeq (${SDEI_SUPPORT},1)
155BL31_SOURCES += plat/xilinx/zynqmp/zynqmp_ehf.c \
156 plat/xilinx/zynqmp/zynqmp_sdei.c
157endif
158
Venkatesh Yadav Abbarapu2dfbba42020-07-13 21:18:01 -0600159BL31_CPPFLAGS += -fno-jump-tables
Venkatesh Yadav Abbarapuf9d518a2021-12-06 21:28:34 -0700160TF_CFLAGS_aarch64 += -mbranch-protection=none
Venkatesh Yadav Abbarapu2dfbba42020-07-13 21:18:01 -0600161
Amit Nagalf7ecba32023-02-15 18:43:55 +0530162ifdef CUSTOM_PKG_PATH
163include $(CUSTOM_PKG_PATH)/custom_pkg.mk
164else
165BL31_SOURCES += plat/xilinx/zynqmp/custom_sip_svc.c
166endif
167
Wendy Liangc31c48b2019-01-21 13:45:48 +0530168ifneq (${RESET_TO_BL31},1)
169 $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.")
170endif