Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Soby Mathew | a0fedc4 | 2016-06-16 14:52:04 +0100 | [diff] [blame] | 2 | * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __PSCI_PRIVATE_H__ |
| 32 | #define __PSCI_PRIVATE_H__ |
| 33 | |
Achin Gupta | a59caa4 | 2013-12-05 14:21:04 +0000 | [diff] [blame] | 34 | #include <arch.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 35 | #include <bakery_lock.h> |
Soby Mathew | 8595b87 | 2015-01-06 15:36:38 +0000 | [diff] [blame] | 36 | #include <bl_common.h> |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 37 | #include <cpu_data.h> |
Yatharth Kochar | 241ec6c | 2016-05-09 18:26:35 +0100 | [diff] [blame] | 38 | #include <pmf.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 39 | #include <psci.h> |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 40 | #include <spinlock.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 41 | |
Soby Mathew | 523d633 | 2015-01-08 18:02:19 +0000 | [diff] [blame] | 42 | /* |
| 43 | * The following helper macros abstract the interface to the Bakery |
| 44 | * Lock API. |
| 45 | */ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 46 | #define psci_lock_init(non_cpu_pd_node, idx) \ |
| 47 | ((non_cpu_pd_node)[(idx)].lock_index = (idx)) |
| 48 | #define psci_lock_get(non_cpu_pd_node) \ |
Andrew Thoelke | e466c9f | 2015-09-10 11:39:36 +0100 | [diff] [blame] | 49 | bakery_lock_get(&psci_locks[(non_cpu_pd_node)->lock_index]) |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 50 | #define psci_lock_release(non_cpu_pd_node) \ |
Andrew Thoelke | e466c9f | 2015-09-10 11:39:36 +0100 | [diff] [blame] | 51 | bakery_lock_release(&psci_locks[(non_cpu_pd_node)->lock_index]) |
Andrew Thoelke | 56f4470 | 2014-06-20 00:36:14 +0100 | [diff] [blame] | 52 | |
Soby Mathew | 6cdddaf | 2015-01-07 11:10:22 +0000 | [diff] [blame] | 53 | /* |
| 54 | * The PSCI capability which are provided by the generic code but does not |
| 55 | * depend on the platform or spd capabilities. |
| 56 | */ |
| 57 | #define PSCI_GENERIC_CAP \ |
| 58 | (define_psci_cap(PSCI_VERSION) | \ |
| 59 | define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \ |
| 60 | define_psci_cap(PSCI_FEATURES)) |
| 61 | |
| 62 | /* |
| 63 | * The PSCI capabilities mask for 64 bit functions. |
| 64 | */ |
| 65 | #define PSCI_CAP_64BIT_MASK \ |
| 66 | (define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) | \ |
| 67 | define_psci_cap(PSCI_CPU_ON_AARCH64) | \ |
| 68 | define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) | \ |
| 69 | define_psci_cap(PSCI_MIG_AARCH64) | \ |
Soby Mathew | 9616838 | 2014-12-17 14:47:57 +0000 | [diff] [blame] | 70 | define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) | \ |
Yatharth Kochar | 241ec6c | 2016-05-09 18:26:35 +0100 | [diff] [blame] | 71 | define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64) | \ |
| 72 | define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64) | \ |
| 73 | define_psci_cap(PSCI_STAT_COUNT_AARCH64)) |
Soby Mathew | 6cdddaf | 2015-01-07 11:10:22 +0000 | [diff] [blame] | 74 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 75 | /* |
| 76 | * Helper macros to get/set the fields of PSCI per-cpu data. |
| 77 | */ |
| 78 | #define psci_set_aff_info_state(aff_state) \ |
| 79 | set_cpu_data(psci_svc_cpu_data.aff_info_state, aff_state) |
| 80 | #define psci_get_aff_info_state() \ |
| 81 | get_cpu_data(psci_svc_cpu_data.aff_info_state) |
| 82 | #define psci_get_aff_info_state_by_idx(idx) \ |
| 83 | get_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state) |
Soby Mathew | ca37050 | 2016-01-26 11:47:53 +0000 | [diff] [blame] | 84 | #define psci_set_aff_info_state_by_idx(idx, aff_state) \ |
| 85 | set_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state,\ |
| 86 | aff_state) |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 87 | #define psci_get_suspend_pwrlvl() \ |
| 88 | get_cpu_data(psci_svc_cpu_data.target_pwrlvl) |
| 89 | #define psci_set_suspend_pwrlvl(target_lvl) \ |
| 90 | set_cpu_data(psci_svc_cpu_data.target_pwrlvl, target_lvl) |
| 91 | #define psci_set_cpu_local_state(state) \ |
| 92 | set_cpu_data(psci_svc_cpu_data.local_state, state) |
| 93 | #define psci_get_cpu_local_state() \ |
| 94 | get_cpu_data(psci_svc_cpu_data.local_state) |
| 95 | #define psci_get_cpu_local_state_by_idx(idx) \ |
| 96 | get_cpu_data_by_index(idx, psci_svc_cpu_data.local_state) |
| 97 | |
| 98 | /* |
| 99 | * Helper macros for the CPU level spinlocks |
| 100 | */ |
| 101 | #define psci_spin_lock_cpu(idx) spin_lock(&psci_cpu_pd_nodes[idx].cpu_lock) |
| 102 | #define psci_spin_unlock_cpu(idx) spin_unlock(&psci_cpu_pd_nodes[idx].cpu_lock) |
| 103 | |
| 104 | /* Helper macro to identify a CPU standby request in PSCI Suspend call */ |
| 105 | #define is_cpu_standby_req(is_power_down_state, retn_lvl) \ |
| 106 | (((!(is_power_down_state)) && ((retn_lvl) == 0)) ? 1 : 0) |
Soby Mathew | 6cdddaf | 2015-01-07 11:10:22 +0000 | [diff] [blame] | 107 | |
Yatharth Kochar | 241ec6c | 2016-05-09 18:26:35 +0100 | [diff] [blame] | 108 | /* Following are used as ID's to capture time-stamp */ |
| 109 | #define PSCI_STAT_ID_ENTER_LOW_PWR 0 |
| 110 | #define PSCI_STAT_ID_EXIT_LOW_PWR 1 |
| 111 | #define PSCI_STAT_TOTAL_IDS 2 |
| 112 | |
| 113 | /* Declare PMF service functions for PSCI */ |
| 114 | PMF_DECLARE_CAPTURE_TIMESTAMP(psci_svc) |
| 115 | PMF_DECLARE_GET_TIMESTAMP(psci_svc) |
| 116 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 117 | /******************************************************************************* |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 118 | * The following two data structures implement the power domain tree. The tree |
| 119 | * is used to track the state of all the nodes i.e. power domain instances |
| 120 | * described by the platform. The tree consists of nodes that describe CPU power |
| 121 | * domains i.e. leaf nodes and all other power domains which are parents of a |
| 122 | * CPU power domain i.e. non-leaf nodes. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 123 | ******************************************************************************/ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 124 | typedef struct non_cpu_pwr_domain_node { |
| 125 | /* |
| 126 | * Index of the first CPU power domain node level 0 which has this node |
| 127 | * as its parent. |
| 128 | */ |
| 129 | unsigned int cpu_start_idx; |
| 130 | |
| 131 | /* |
| 132 | * Number of CPU power domains which are siblings of the domain indexed |
| 133 | * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx |
| 134 | * -> cpu_start_idx + ncpus' have this node as their parent. |
| 135 | */ |
| 136 | unsigned int ncpus; |
| 137 | |
| 138 | /* |
| 139 | * Index of the parent power domain node. |
| 140 | * TODO: Figure out whether to whether using pointer is more efficient. |
| 141 | */ |
| 142 | unsigned int parent_node; |
| 143 | |
| 144 | plat_local_state_t local_state; |
| 145 | |
Achin Gupta | 75f7367 | 2013-12-05 16:33:10 +0000 | [diff] [blame] | 146 | unsigned char level; |
Andrew Thoelke | e466c9f | 2015-09-10 11:39:36 +0100 | [diff] [blame] | 147 | |
| 148 | /* For indexing the psci_lock array*/ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 149 | unsigned char lock_index; |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 150 | } non_cpu_pd_node_t; |
| 151 | |
| 152 | typedef struct cpu_pwr_domain_node { |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 153 | u_register_t mpidr; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 154 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 155 | /* |
| 156 | * Index of the parent power domain node. |
| 157 | * TODO: Figure out whether to whether using pointer is more efficient. |
| 158 | */ |
| 159 | unsigned int parent_node; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 160 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 161 | /* |
| 162 | * A CPU power domain does not require state coordination like its |
| 163 | * parent power domains. Hence this node does not include a bakery |
| 164 | * lock. A spinlock is required by the CPU_ON handler to prevent a race |
| 165 | * when multiple CPUs try to turn ON the same target CPU. |
| 166 | */ |
| 167 | spinlock_t cpu_lock; |
| 168 | } cpu_pd_node_t; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 169 | |
| 170 | /******************************************************************************* |
| 171 | * Data prototypes |
| 172 | ******************************************************************************/ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 173 | extern const plat_psci_ops_t *psci_plat_pm_ops; |
| 174 | extern non_cpu_pd_node_t psci_non_cpu_pd_nodes[PSCI_NUM_NON_CPU_PWR_DOMAINS]; |
| 175 | extern cpu_pd_node_t psci_cpu_pd_nodes[PLATFORM_CORE_COUNT]; |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 176 | extern unsigned int psci_caps; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 177 | |
Andrew Thoelke | e466c9f | 2015-09-10 11:39:36 +0100 | [diff] [blame] | 178 | /* One bakery lock is required for each non-cpu power domain */ |
| 179 | DECLARE_BAKERY_LOCK(psci_locks[PSCI_NUM_NON_CPU_PWR_DOMAINS]); |
| 180 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 181 | /******************************************************************************* |
Jeenu Viswambharan | 7f36660 | 2014-02-20 17:11:00 +0000 | [diff] [blame] | 182 | * SPD's power management hooks registered with PSCI |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 183 | ******************************************************************************/ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 184 | extern const spd_pm_ops_t *psci_spd_pm; |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 185 | |
| 186 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 187 | * Function prototypes |
| 188 | ******************************************************************************/ |
| 189 | /* Private exported functions from psci_common.c */ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 190 | int psci_validate_power_state(unsigned int power_state, |
| 191 | psci_power_state_t *state_info); |
| 192 | void psci_query_sys_suspend_pwrstate(psci_power_state_t *state_info); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 193 | int psci_validate_mpidr(u_register_t mpidr); |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 194 | void psci_init_req_local_pwr_states(void); |
Soby Mathew | f1f97a1 | 2015-07-15 12:13:26 +0100 | [diff] [blame] | 195 | int psci_validate_entry_point(entry_point_info_t *ep, |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 196 | uintptr_t entrypoint, u_register_t context_id); |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 197 | void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx, |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 198 | unsigned int end_lvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 199 | unsigned int node_index[]); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 200 | void psci_do_state_coordination(unsigned int end_pwrlvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 201 | psci_power_state_t *state_info); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 202 | void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 203 | unsigned int cpu_idx); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 204 | void psci_release_pwr_domain_locks(unsigned int end_pwrlvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 205 | unsigned int cpu_idx); |
| 206 | int psci_validate_suspend_req(const psci_power_state_t *state_info, |
| 207 | unsigned int is_power_down_state_req); |
| 208 | unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info); |
| 209 | unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 210 | void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl); |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 211 | void psci_print_power_domain_map(void); |
Soby Mathew | 9616838 | 2014-12-17 14:47:57 +0000 | [diff] [blame] | 212 | unsigned int psci_is_last_on_cpu(void); |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 213 | int psci_spd_migrate_info(u_register_t *mpidr); |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 214 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 215 | /* Private exported functions from psci_on.c */ |
Soby Mathew | a0fedc4 | 2016-06-16 14:52:04 +0100 | [diff] [blame] | 216 | int psci_cpu_on_start(u_register_t target_cpu, |
Sandrine Bailleux | 7497bff | 2016-04-25 09:28:43 +0100 | [diff] [blame] | 217 | entry_point_info_t *ep); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 218 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 219 | void psci_cpu_on_finish(unsigned int cpu_idx, |
| 220 | psci_power_state_t *state_info); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 221 | |
Sandrine Bailleux | f4119ec | 2015-12-17 13:58:58 +0000 | [diff] [blame] | 222 | /* Private exported functions from psci_off.c */ |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 223 | int psci_do_cpu_off(unsigned int end_pwrlvl); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 224 | |
Sandrine Bailleux | f4119ec | 2015-12-17 13:58:58 +0000 | [diff] [blame] | 225 | /* Private exported functions from psci_suspend.c */ |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 226 | void psci_cpu_suspend_start(entry_point_info_t *ep, |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 227 | unsigned int end_pwrlvl, |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 228 | psci_power_state_t *state_info, |
| 229 | unsigned int is_power_down_state_req); |
Soby Mathew | 8595b87 | 2015-01-06 15:36:38 +0000 | [diff] [blame] | 230 | |
Soby Mathew | 981487a | 2015-07-13 14:10:57 +0100 | [diff] [blame] | 231 | void psci_cpu_suspend_finish(unsigned int cpu_idx, |
| 232 | psci_power_state_t *state_info); |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 233 | |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 234 | /* Private exported functions from psci_helpers.S */ |
Soby Mathew | 011ca18 | 2015-07-29 17:05:03 +0100 | [diff] [blame] | 235 | void psci_do_pwrdown_cache_maintenance(unsigned int pwr_level); |
Achin Gupta | e1aa516 | 2014-06-26 09:58:52 +0100 | [diff] [blame] | 236 | void psci_do_pwrup_cache_maintenance(void); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 237 | |
Juan Castillo | 4dc4a47 | 2014-08-12 11:17:06 +0100 | [diff] [blame] | 238 | /* Private exported functions from psci_system_off.c */ |
| 239 | void __dead2 psci_system_off(void); |
| 240 | void __dead2 psci_system_reset(void); |
| 241 | |
Yatharth Kochar | 241ec6c | 2016-05-09 18:26:35 +0100 | [diff] [blame] | 242 | /* Private exported functions from psci_stat.c */ |
| 243 | void psci_stats_update_pwr_down(unsigned int end_pwrlvl, |
| 244 | const psci_power_state_t *state_info); |
| 245 | void psci_stats_update_pwr_up(unsigned int end_pwrlvl, |
| 246 | const psci_power_state_t *state_info, |
| 247 | unsigned int flags); |
| 248 | u_register_t psci_stat_residency(u_register_t target_cpu, |
| 249 | unsigned int power_state); |
| 250 | u_register_t psci_stat_count(u_register_t target_cpu, |
| 251 | unsigned int power_state); |
| 252 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 253 | #endif /* __PSCI_PRIVATE_H__ */ |