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Sandrine Bailleux798140d2014-07-17 16:06:39 +01001#
Juan Pablo Condeb30b9b72023-08-09 18:16:40 -05002# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
Sandrine Bailleux798140d2014-07-17 16:06:39 +01003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Sandrine Bailleux798140d2014-07-17 16:06:39 +01005#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Alexei Fedorovcaa18022020-07-14 10:47:25 +01009# Include GICv2 driver files
10include drivers/arm/gic/v2/gicv2.mk
11
12JUNO_GIC_SOURCES := ${GICV2_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +000013 plat/common/plat_gicv2.c \
14 plat/arm/common/arm_gicv2.c
15
Vikram Kanigirifbb13012016-02-15 11:54:14 +000016JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \
17 plat/arm/common/arm_cci.c
18
Soby Mathew9c708b52016-02-26 14:23:19 +000019JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +000020 plat/arm/board/juno/juno_security.c \
dp-arm8f59e152017-02-27 12:21:43 +000021 plat/arm/board/juno/juno_trng.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +000022 plat/arm/common/arm_tzc400.c
23
dp-armb3263b32017-02-28 14:43:15 +000024ifneq (${ENABLE_STACK_PROTECTOR}, 0)
25JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c
26endif
Vikram Kanigirifbb13012016-02-15 11:54:14 +000027
Sathees Balya22576072018-09-03 17:41:13 +010028# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
29# SCP during power management operations and for SCP RAM Firmware transfer.
30CSS_USE_SCMI_SDS_DRIVER := 1
31
Antonio Nino Diaz09d58762019-01-23 19:06:55 +000032PLAT_INCLUDES := -Iplat/arm/board/juno/include
Juan Castillo921b8772014-09-05 17:29:38 +010033
Antonio Nino Diazcbc68262018-10-10 11:02:34 +010034PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S \
35 plat/arm/board/juno/juno_common.c
Juan Castillo921b8772014-09-05 17:29:38 +010036
Yatharth Kocharede39cb2016-11-14 12:01:04 +000037# Flag to enable support for AArch32 state on JUNO
38JUNO_AARCH32_EL3_RUNTIME := 0
39$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME))
40$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME))
41
Summer Qin13b95c22018-03-02 15:51:14 +080042# Flag to enable support for TZMP1 on JUNO
43JUNO_TZMP1 := 0
44$(eval $(call assert_boolean,JUNO_TZMP1))
45ifeq (${JUNO_TZMP1}, 1)
Rajasekaran Kalidoss85999a82023-05-08 14:55:13 +020046 ifeq (${ETHOSN_NPU_TZMP1},1)
47 $(error JUNO_TZMP1 cannot be used together with ETHOSN_NPU_TZMP1)
Bjorn Engstrom74c5f872022-08-26 09:45:45 +020048 else
49 $(eval $(call add_define,JUNO_TZMP1))
50 endif
Summer Qin13b95c22018-03-02 15:51:14 +080051endif
52
Andre Przywara31ed4702020-10-08 00:45:22 +010053TRNG_SUPPORT := 1
54
Soby Mathewbf169232017-11-14 14:10:10 +000055ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
56# Include BL32 in FIP
57NEED_BL32 := yes
58# BL31 is not required
59override BL31_SOURCES =
60
61# The BL32 needs to be built separately invoking the AARCH32 compiler and
62# be specifed via `BL32` build option.
63 ifneq (${ARCH}, aarch32)
64 override BL32_SOURCES =
65 endif
Juan Pablo Condeb30b9b72023-08-09 18:16:40 -050066else
67 ifeq (${ARCH}, aarch32)
68 $(error JUNO_AARCH32_EL3_RUNTIME has to be enabled to build BL32 for AArch32)
69 endif
Soby Mathewbf169232017-11-14 14:10:10 +000070endif
71
Yatharth Kocharede39cb2016-11-14 12:01:04 +000072ifeq (${ARCH},aarch64)
Dan Handley7bef8002015-03-19 19:22:44 +000073BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
Brendan Jackmana443d222015-10-30 16:25:12 +000074 lib/cpus/aarch64/cortex_a57.S \
Juan Castillob6132f12015-10-06 14:01:35 +010075 lib/cpus/aarch64/cortex_a72.S \
Sathees Balya22576072018-09-03 17:41:13 +010076 plat/arm/board/juno/juno_err.c \
Yatharth Kochar736a3bf2015-10-11 14:14:55 +010077 plat/arm/board/juno/juno_bl1_setup.c \
Aditya Angadi20b48412019-04-16 11:29:14 +053078 drivers/arm/sp805/sp805.c \
dp-armb3263b32017-02-28 14:43:15 +000079 ${JUNO_INTERCONNECT_SOURCES} \
80 ${JUNO_SECURITY_SOURCES}
Juan Castillo921b8772014-09-05 17:29:38 +010081
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +010082BL2_SOURCES += drivers/arm/sp805/sp805.c \
83 lib/utils/mem_region.c \
Sathees Balya22576072018-09-03 17:41:13 +010084 plat/arm/board/juno/juno_err.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +010085 plat/arm/board/juno/juno_bl2_setup.c \
86 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +000087 ${JUNO_SECURITY_SOURCES}
Juan Castillo921b8772014-09-05 17:29:38 +010088
Vikram Kanigiri70752bb2016-02-10 14:50:53 +000089BL2U_SOURCES += ${JUNO_SECURITY_SOURCES}
Yatharth Kochar3a11eda2015-10-14 15:28:11 +010090
Antonio Nino Diazd7da2f82018-10-10 11:14:44 +010091BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \
92 lib/cpus/aarch64/cortex_a53.S \
Soby Mathew61e8d0b2015-10-12 17:32:29 +010093 lib/cpus/aarch64/cortex_a57.S \
Brendan Jackmana443d222015-10-30 16:25:12 +000094 lib/cpus/aarch64/cortex_a72.S \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +010095 lib/utils/mem_region.c \
Mikael Olsson0232da22021-02-12 17:30:16 +010096 lib/fconf/fconf.c \
97 lib/fconf/fconf_dyn_cfg_getter.c \
98 plat/arm/board/juno/juno_bl31_setup.c \
Chandni Cherukurie4bf6a02018-11-14 13:43:59 +053099 plat/arm/board/juno/juno_pm.c \
Soby Mathew47e43f22016-02-01 14:04:34 +0000100 plat/arm/board/juno/juno_topology.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100101 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000102 ${JUNO_GIC_SOURCES} \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000103 ${JUNO_INTERCONNECT_SOURCES} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000104 ${JUNO_SECURITY_SOURCES}
Sathees Balya22576072018-09-03 17:41:13 +0100105
Chris Kaye9272152021-09-28 15:52:14 +0100106BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
107
Sathees Balya22576072018-09-03 17:41:13 +0100108ifeq (${CSS_USE_SCMI_SDS_DRIVER},1)
Antonio Nino Diaz09d58762019-01-23 19:06:55 +0000109BL1_SOURCES += drivers/arm/css/sds/sds.c
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000110endif
Juan Castillo921b8772014-09-05 17:29:38 +0100111
Max Shvetsov06dba292019-12-06 11:50:12 +0000112ifeq (${TRUSTED_BOARD_BOOT}, 1)
Rob Hughes9a2177a2023-01-17 16:10:26 +0000113 # Enable Juno specific TBBR images
114 $(eval $(call add_define,PLAT_TBBR_IMG_DEF))
115 DTC_CPPFLAGS += ${PLAT_INCLUDES}
116
117 BL1_SOURCES += plat/arm/board/juno/juno_trusted_boot.c
118 BL2_SOURCES += plat/arm/board/juno/juno_trusted_boot.c
119
120 ifeq (${COT_DESC_IN_DTB},0)
121 BL2_SOURCES += plat/arm/board/juno/juno_tbbr_cot_bl2.c
122 endif
Max Shvetsov06dba292019-12-06 11:50:12 +0000123endif
124
Sathees Balya22576072018-09-03 17:41:13 +0100125endif
126
Deepak Pandeyb0971f92018-05-25 12:43:30 +0530127ifneq (${RESET_TO_BL31},0)
Sandrine Bailleux1e32d322019-01-07 15:35:37 +0100128 $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
Deepak Pandeyb0971f92018-05-25 12:43:30 +0530129 Please set RESET_TO_BL31 to 0.")
130endif
131
Sathees Balya6f07a602018-11-02 14:56:06 +0000132ifeq ($(USE_ROMLIB),1)
133all : bl1_romlib.bin
134endif
135
Zelalem15f378d2021-02-02 09:49:07 -0600136bl1_romlib.bin : $(BUILD_PLAT)/bl1.bin romlib.bin
Sathees Balya6f07a602018-11-02 14:56:06 +0000137 @echo "Building combined BL1 and ROMLIB binary for Juno $@"
138 ./lib/romlib/gen_combined_bl1_romlib.sh -o bl1_romlib.bin $(BUILD_PLAT)
139
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100140# Errata workarounds for Cortex-A53:
Ambroise Vincentbde42462019-02-22 14:19:16 +0000141ERRATA_A53_819472 := 1
142ERRATA_A53_824069 := 1
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100143ERRATA_A53_826319 := 1
Ambroise Vincentbde42462019-02-22 14:19:16 +0000144ERRATA_A53_827319 := 1
Douglas Raillardd56fb042017-06-19 15:38:02 +0100145ERRATA_A53_835769 := 1
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100146ERRATA_A53_836870 := 1
Douglas Raillardd56fb042017-06-19 15:38:02 +0100147ERRATA_A53_843419 := 1
Andre Przywara00eefd92016-10-06 16:54:53 +0100148ERRATA_A53_855873 := 1
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100149
150# Errata workarounds for Cortex-A57:
Vikram Kanigirieade34c2016-01-20 15:57:35 +0000151ERRATA_A57_806969 := 0
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000152ERRATA_A57_813419 := 1
Vikram Kanigirieade34c2016-01-20 15:57:35 +0000153ERRATA_A57_813420 := 1
Ambroise Vincentbde42462019-02-22 14:19:16 +0000154ERRATA_A57_814670 := 1
155ERRATA_A57_817169 := 1
Douglas Raillard71d4fe22017-02-28 17:56:15 +0000156ERRATA_A57_826974 := 1
157ERRATA_A57_826977 := 1
158ERRATA_A57_828024 := 1
159ERRATA_A57_829520 := 1
160ERRATA_A57_833471 := 1
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100161ERRATA_A57_859972 := 0
Douglas Raillard71d4fe22017-02-28 17:56:15 +0000162
Eleanor Bonnici8392aab2017-08-04 15:03:51 +0100163# Errata workarounds for Cortex-A72:
164ERRATA_A72_859971 := 0
Soby Mathew937488b2014-09-22 14:13:34 +0100165
166# Enable option to skip L1 data cache flush during the Cortex-A57 cluster
167# power down sequence
168SKIP_A57_L1_FLUSH_PWR_DWN := 1
Dan Handley7bef8002015-03-19 19:22:44 +0000169
David Cunadoc5b0c0f2017-10-31 23:19:21 +0000170# Do not enable SVE
171ENABLE_SVE_FOR_NS := 0
172
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000173# Enable the dynamic translation tables library.
174ifeq (${ARCH},aarch32)
175 ifeq (${RESET_TO_SP_MIN},1)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900176 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000177 endif
178else
179 ifeq (${RESET_TO_BL31},1)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900180 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000181 endif
182endif
183
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000184ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
185 ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900186 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000187 else
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900188 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000189 endif
190endif
191
Andre Przywarac7d10e32020-10-16 12:06:57 +0100192BL1_CPPFLAGS += -march=armv8-a+crc
193BL2_CPPFLAGS += -march=armv8-a+crc
194BL2U_CPPFLAGS += -march=armv8-a+crc
195BL31_CPPFLAGS += -march=armv8-a+crc
196BL32_CPPFLAGS += -march=armv8-a+crc
197
Louis Mayencourt65cac462019-07-29 10:40:17 +0100198# Add the FDT_SOURCES and options for Dynamic Config
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100199FDT_SOURCES += plat/arm/board/juno/fdts/${PLAT}_fw_config.dts \
Mikael Olsson0232da22021-02-12 17:30:16 +0100200 plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts \
201 fdts/${PLAT}.dts
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100202
203FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
204TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Mikael Olsson0232da22021-02-12 17:30:16 +0100205HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
Louis Mayencourt65cac462019-07-29 10:40:17 +0100206
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100207# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100208$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
Louis Mayencourt65cac462019-07-29 10:40:17 +0100209# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100210$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
Mikael Olsson0232da22021-02-12 17:30:16 +0100211# Add the HW_CONFIG to FIP and specify the same to certtool
212$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG}))
Louis Mayencourt65cac462019-07-29 10:40:17 +0100213
Rajasekaran Kalidoss85999a82023-05-08 14:55:13 +0200214include drivers/arm/ethosn/ethosn_npu.mk
Antonio Nino Diazcbc68262018-10-10 11:02:34 +0100215include plat/arm/board/common/board_common.mk
Dan Handley7bef8002015-03-19 19:22:44 +0000216include plat/arm/common/arm_common.mk
217include plat/arm/soc/common/soc_css.mk
218include plat/arm/css/common/css_common.mk