Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 1 | /* |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 2 | * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | #ifndef __CPU_MACROS_S__ |
| 31 | #define __CPU_MACROS_S__ |
| 32 | |
| 33 | #include <arch.h> |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 34 | #include <errata_report.h> |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 35 | |
| 36 | #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \ |
| 37 | (MIDR_PN_MASK << MIDR_PN_SHIFT) |
| 38 | |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 39 | /* The number of CPU operations allowed */ |
| 40 | #define CPU_MAX_PWR_DWN_OPS 2 |
| 41 | |
| 42 | /* Special constant to specify that CPU has no reset function */ |
| 43 | #define CPU_NO_RESET_FUNC 0 |
| 44 | |
| 45 | /* Word size for 32-bit CPUs */ |
| 46 | #define CPU_WORD_SIZE 4 |
| 47 | |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 48 | /* |
| 49 | * Whether errata status needs reporting. Errata status is printed in debug |
| 50 | * builds for both BL1 and BL32 images. |
| 51 | */ |
| 52 | #if (defined(IMAGE_BL1) || defined(IMAGE_BL32)) && DEBUG |
| 53 | # define REPORT_ERRATA 1 |
| 54 | #else |
| 55 | # define REPORT_ERRATA 0 |
| 56 | #endif |
| 57 | |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 58 | /* |
| 59 | * Define the offsets to the fields in cpu_ops structure. |
| 60 | */ |
| 61 | .struct 0 |
| 62 | CPU_MIDR: /* cpu_ops midr */ |
| 63 | .space 4 |
| 64 | /* Reset fn is needed during reset */ |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 65 | #if defined(IMAGE_BL1) || defined(IMAGE_BL32) |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 66 | CPU_RESET_FUNC: /* cpu_ops reset_func */ |
| 67 | .space 4 |
Yatharth Kochar | f528faf | 2016-06-28 16:58:26 +0100 | [diff] [blame] | 68 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 69 | #ifdef IMAGE_BL32 /* The power down core and cluster is needed only in BL32 */ |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 70 | CPU_PWR_DWN_OPS: /* cpu_ops power down functions */ |
| 71 | .space (4 * CPU_MAX_PWR_DWN_OPS) |
Yatharth Kochar | f528faf | 2016-06-28 16:58:26 +0100 | [diff] [blame] | 72 | #endif |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 73 | |
| 74 | /* |
| 75 | * Fields required to print errata status. Only in BL32 that the printing |
| 76 | * require mutual exclusion and printed flag. |
| 77 | */ |
| 78 | #if REPORT_ERRATA |
| 79 | CPU_ERRATA_FUNC: /* CPU errata status printing function */ |
| 80 | .space 4 |
| 81 | #ifdef IMAGE_BL32 |
| 82 | CPU_ERRATA_LOCK: |
| 83 | .space 4 |
| 84 | CPU_ERRATA_PRINTED: |
| 85 | .space 4 |
| 86 | #endif |
| 87 | #endif |
| 88 | |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 89 | CPU_OPS_SIZE = . |
| 90 | |
| 91 | /* |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 92 | * Write given expressions as words |
| 93 | * |
| 94 | * _count: |
| 95 | * Write at least _count words. If the given number of expressions |
| 96 | * is less than _count, repeat the last expression to fill _count |
| 97 | * words in total |
| 98 | * _rest: |
| 99 | * Optional list of expressions. _this is for parameter extraction |
| 100 | * only, and has no significance to the caller |
| 101 | * |
| 102 | * Invoked as: |
| 103 | * fill_constants 2, foo, bar, blah, ... |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 104 | */ |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 105 | .macro fill_constants _count:req, _this, _rest:vararg |
| 106 | .ifgt \_count |
| 107 | /* Write the current expression */ |
| 108 | .ifb \_this |
| 109 | .error "Nothing to fill" |
| 110 | .endif |
| 111 | .word \_this |
| 112 | |
| 113 | /* Invoke recursively for remaining expressions */ |
| 114 | .ifnb \_rest |
| 115 | fill_constants \_count-1, \_rest |
| 116 | .else |
| 117 | fill_constants \_count-1, \_this |
| 118 | .endif |
| 119 | .endif |
| 120 | .endm |
| 121 | |
| 122 | /* |
| 123 | * Declare CPU operations |
| 124 | * |
| 125 | * _name: |
| 126 | * Name of the CPU for which operations are being specified |
| 127 | * _midr: |
| 128 | * Numeric value expected to read from CPU's MIDR |
| 129 | * _resetfunc: |
| 130 | * Reset function for the CPU. If there's no CPU reset function, |
| 131 | * specify CPU_NO_RESET_FUNC |
| 132 | * _power_down_ops: |
| 133 | * Comma-separated list of functions to perform power-down |
| 134 | * operatios on the CPU. At least one, and up to |
| 135 | * CPU_MAX_PWR_DWN_OPS number of functions may be specified. |
| 136 | * Starting at power level 0, these functions shall handle power |
| 137 | * down at subsequent power levels. If there aren't exactly |
| 138 | * CPU_MAX_PWR_DWN_OPS functions, the last specified one will be |
| 139 | * used to handle power down at subsequent levels |
| 140 | */ |
| 141 | .macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \ |
| 142 | _power_down_ops:vararg |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 143 | .section cpu_ops, "a" |
| 144 | .align 2 |
| 145 | .type cpu_ops_\_name, %object |
| 146 | .word \_midr |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 147 | #if defined(IMAGE_BL1) || defined(IMAGE_BL32) |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 148 | .word \_resetfunc |
Yatharth Kochar | f528faf | 2016-06-28 16:58:26 +0100 | [diff] [blame] | 149 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 150 | #ifdef IMAGE_BL32 |
Jeenu Viswambharan | ee5eb80 | 2016-11-18 12:58:28 +0000 | [diff] [blame] | 151 | 1: |
| 152 | /* Insert list of functions */ |
| 153 | fill_constants CPU_MAX_PWR_DWN_OPS, \_power_down_ops |
| 154 | 2: |
| 155 | /* |
| 156 | * Error if no or more than CPU_MAX_PWR_DWN_OPS were specified in the |
| 157 | * list |
| 158 | */ |
| 159 | .ifeq 2b - 1b |
| 160 | .error "At least one power down function must be specified" |
| 161 | .else |
| 162 | .iflt 2b - 1b - (CPU_MAX_PWR_DWN_OPS * CPU_WORD_SIZE) |
| 163 | .error "More than CPU_MAX_PWR_DWN_OPS functions specified" |
| 164 | .endif |
| 165 | .endif |
Yatharth Kochar | f528faf | 2016-06-28 16:58:26 +0100 | [diff] [blame] | 166 | #endif |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 167 | |
| 168 | #if REPORT_ERRATA |
| 169 | .ifndef \_name\()_cpu_str |
| 170 | /* |
| 171 | * Place errata reported flag, and the spinlock to arbitrate access to |
| 172 | * it in the data section. |
| 173 | */ |
| 174 | .pushsection .data |
| 175 | define_asm_spinlock \_name\()_errata_lock |
| 176 | \_name\()_errata_reported: |
| 177 | .word 0 |
| 178 | .popsection |
| 179 | |
| 180 | /* Place CPU string in rodata */ |
| 181 | .pushsection .rodata |
| 182 | \_name\()_cpu_str: |
| 183 | .asciz "\_name" |
| 184 | .popsection |
| 185 | .endif |
| 186 | |
| 187 | /* |
| 188 | * Weakly-bound, optional errata status printing function for CPUs of |
| 189 | * this class. |
| 190 | */ |
| 191 | .weak \_name\()_errata_report |
| 192 | .word \_name\()_errata_report |
| 193 | |
| 194 | #ifdef IMAGE_BL32 |
| 195 | /* Pointers to errata lock and reported flag */ |
| 196 | .word \_name\()_errata_lock |
| 197 | .word \_name\()_errata_reported |
| 198 | #endif |
| 199 | #endif |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 200 | .endm |
| 201 | |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 202 | #if REPORT_ERRATA |
| 203 | /* |
| 204 | * Print status of a CPU errata |
| 205 | * |
| 206 | * _chosen: |
| 207 | * Identifier indicating whether or not a CPU errata has been |
| 208 | * compiled in. |
| 209 | * _cpu: |
| 210 | * Name of the CPU |
| 211 | * _id: |
| 212 | * Errata identifier |
| 213 | * _rev_var: |
| 214 | * Register containing the combined value CPU revision and variant |
| 215 | * - typically the return value of cpu_get_rev_var |
| 216 | */ |
| 217 | .macro report_errata _chosen, _cpu, _id, _rev_var=r4 |
| 218 | /* Stash a string with errata ID */ |
| 219 | .pushsection .rodata |
| 220 | \_cpu\()_errata_\_id\()_str: |
| 221 | .asciz "\_id" |
| 222 | .popsection |
| 223 | |
| 224 | /* Check whether errata applies */ |
| 225 | mov r0, \_rev_var |
| 226 | bl check_errata_\_id |
| 227 | |
| 228 | .ifeq \_chosen |
| 229 | /* |
| 230 | * Errata workaround has not been compiled in. If the errata would have |
| 231 | * applied had it been compiled in, print its status as missing. |
| 232 | */ |
| 233 | cmp r0, #0 |
| 234 | movne r0, #ERRATA_MISSING |
| 235 | .endif |
| 236 | ldr r1, =\_cpu\()_cpu_str |
| 237 | ldr r2, =\_cpu\()_errata_\_id\()_str |
| 238 | bl errata_print_msg |
| 239 | .endm |
| 240 | #endif |
| 241 | |
Soby Mathew | 748be1d | 2016-05-05 14:10:46 +0100 | [diff] [blame] | 242 | #endif /* __CPU_MACROS_S__ */ |