blob: 651189b124435fe669954e66aaf0be99e8d02dcb [file] [log] [blame]
Muhammad Hadi Asyrafi Abdul Halimc0d4d932019-03-19 17:59:06 +08001/*
2 * Copyright (c) 2019, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <common/debug.h>
8#include <lib/mmio.h>
Muhammad Hadi Asyrafi Abdul Halimc0d4d932019-03-19 17:59:06 +08009
10#include "watchdog.h"
11
12
13/* Reset watchdog timer */
14void watchdog_sw_rst(void)
15{
16 mmio_write_32(WDT_CRR, WDT_SW_RST);
17}
18
19/* Print component information */
20void watchdog_info(void)
21{
22 INFO("Component Type : %x\r\n", mmio_read_32(WDT_COMP_VERSION));
23 INFO("Component Version : %x\r\n", mmio_read_32(WDT_COMP_TYPE));
24}
25
26/* Check watchdog current status */
27void watchdog_status(void)
28{
29 if (mmio_read_32(WDT_CR) & 1) {
Hadi Asyrafi3b0428c2019-06-17 12:02:18 +080030 INFO("Watchdog Timer is currently enabled\n");
Muhammad Hadi Asyrafi Abdul Halimc0d4d932019-03-19 17:59:06 +080031 INFO("Current Counter : 0x%x\r\n", mmio_read_32(WDT_CCVR));
32 } else {
Hadi Asyrafi3b0428c2019-06-17 12:02:18 +080033 INFO("Watchdog Timer is currently disabled\n");
Muhammad Hadi Asyrafi Abdul Halimc0d4d932019-03-19 17:59:06 +080034 }
35}
36
37/* Initialize & enable watchdog */
38void watchdog_init(int watchdog_clk)
39{
40 uint8_t cycles_i = 0;
41 uint32_t wdt_cycles = WDT_MIN_CYCLES;
42 uint32_t top_init_cycles = WDT_PERIOD * watchdog_clk;
43
44 while ((cycles_i < 15) && (wdt_cycles < top_init_cycles)) {
45 wdt_cycles = (wdt_cycles << 1);
46 cycles_i++;
47 }
48
49 mmio_write_32(WDT_TORR, (cycles_i << 4) | cycles_i);
50
Muhammad Hadi Asyrafi Abdul Halimc0d4d932019-03-19 17:59:06 +080051 mmio_write_32(WDT_CR, WDT_CR_RMOD|WDT_CR_EN);
52}