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Soby Mathew802f8652014-08-14 16:19:29 +01001#
Douglas Raillardd56fb042017-06-19 15:38:02 +01002# Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
Soby Mathew802f8652014-08-14 16:19:29 +01003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Soby Mathew802f8652014-08-14 16:19:29 +01005#
6
Soby Mathew937488b2014-09-22 14:13:34 +01007# Cortex A57 specific optimisation to skip L1 cache flush when
8# cluster is powered down.
9SKIP_A57_L1_FLUSH_PWR_DWN ?=0
10
Sandrine Bailleuxd4817592016-01-13 14:57:38 +000011# Flag to disable the cache non-temporal hint.
12# It is enabled by default.
13A53_DISABLE_NON_TEMPORAL_HINT ?=1
14
15# Flag to disable the cache non-temporal hint.
16# It is enabled by default.
17A57_DISABLE_NON_TEMPORAL_HINT ?=1
18
Soby Mathew937488b2014-09-22 14:13:34 +010019# Process SKIP_A57_L1_FLUSH_PWR_DWN flag
20$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN))
21$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN))
22
Sandrine Bailleuxd4817592016-01-13 14:57:38 +000023# Process A53_DISABLE_NON_TEMPORAL_HINT flag
24$(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT))
25$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT))
26
27# Process A57_DISABLE_NON_TEMPORAL_HINT flag
28$(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT))
29$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT))
30
Soby Mathew937488b2014-09-22 14:13:34 +010031
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +010032# CPU Errata Build flags.
33# These should be enabled by the platform if the erratum workaround needs to be
34# applied.
Soby Mathew802f8652014-08-14 16:19:29 +010035
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +010036# Flag to apply erratum 826319 workaround during reset. This erratum applies
37# only to revision <= r0p2 of the Cortex A53 cpu.
developer4fceaca2015-07-29 20:55:31 +080038ERRATA_A53_826319 ?=0
39
Douglas Raillardd56fb042017-06-19 15:38:02 +010040# Flag to apply erratum 835769 workaround at compile and link time. This
41# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
42# workaround can lead the linker to create "*.stub" sections.
43ERRATA_A53_835769 ?=0
44
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +010045# Flag to apply erratum 836870 workaround during reset. This erratum applies
46# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this
Douglas Raillardc847f662017-02-15 17:38:43 +000047# erratum workaround is enabled by default in hardware.
developer4fceaca2015-07-29 20:55:31 +080048ERRATA_A53_836870 ?=0
49
Douglas Raillardd56fb042017-06-19 15:38:02 +010050# Flag to apply erratum 843419 workaround at link time.
51# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
52# workaround could lead the linker to emit "*.stub" sections which are 4kB
53# aligned.
54ERRATA_A53_843419 ?=0
55
Andre Przywara00eefd92016-10-06 16:54:53 +010056# Flag to apply errata 855873 during reset. This errata applies to all
57# revisions of the Cortex A53 CPU, but this firmware workaround only works
58# for revisions r0p3 and higher. Earlier revisions are taken care
59# of by the rich OS.
60ERRATA_A53_855873 ?=0
61
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +010062# Flag to apply erratum 806969 workaround during reset. This erratum applies
63# only to revision r0p0 of the Cortex A57 cpu.
Soby Mathew802f8652014-08-14 16:19:29 +010064ERRATA_A57_806969 ?=0
65
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +000066# Flag to apply erratum 813419 workaround during reset. This erratum applies
67# only to revision r0p0 of the Cortex A57 cpu.
68ERRATA_A57_813419 ?=0
69
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +010070# Flag to apply erratum 813420 workaround during reset. This erratum applies
71# only to revision r0p0 of the Cortex A57 cpu.
Soby Mathew802f8652014-08-14 16:19:29 +010072ERRATA_A57_813420 ?=0
73
Sandrine Bailleuxa7e0c532016-04-14 13:32:31 +010074# Flag to apply erratum 826974 workaround during reset. This erratum applies
75# only to revision <= r1p1 of the Cortex A57 cpu.
76ERRATA_A57_826974 ?=0
77
Sandrine Bailleuxadcbd552016-04-14 14:24:13 +010078# Flag to apply erratum 826977 workaround during reset. This erratum applies
79# only to revision <= r1p1 of the Cortex A57 cpu.
80ERRATA_A57_826977 ?=0
81
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +010082# Flag to apply erratum 828024 workaround during reset. This erratum applies
83# only to revision <= r1p1 of the Cortex A57 cpu.
84ERRATA_A57_828024 ?=0
85
Sandrine Bailleux48cbe852016-04-14 14:18:07 +010086# Flag to apply erratum 829520 workaround during reset. This erratum applies
87# only to revision <= r1p2 of the Cortex A57 cpu.
88ERRATA_A57_829520 ?=0
89
Sandrine Bailleux143ef1a2016-04-21 11:10:52 +010090# Flag to apply erratum 833471 workaround during reset. This erratum applies
91# only to revision <= r1p2 of the Cortex A57 cpu.
92ERRATA_A57_833471 ?=0
93
developer4fceaca2015-07-29 20:55:31 +080094# Process ERRATA_A53_826319 flag
95$(eval $(call assert_boolean,ERRATA_A53_826319))
96$(eval $(call add_define,ERRATA_A53_826319))
97
Douglas Raillardd56fb042017-06-19 15:38:02 +010098# Process ERRATA_A53_835769 flag
99$(eval $(call assert_boolean,ERRATA_A53_835769))
100$(eval $(call add_define,ERRATA_A53_835769))
101
developer4fceaca2015-07-29 20:55:31 +0800102# Process ERRATA_A53_836870 flag
103$(eval $(call assert_boolean,ERRATA_A53_836870))
104$(eval $(call add_define,ERRATA_A53_836870))
105
Douglas Raillardd56fb042017-06-19 15:38:02 +0100106# Process ERRATA_A53_843419 flag
107$(eval $(call assert_boolean,ERRATA_A53_843419))
108$(eval $(call add_define,ERRATA_A53_843419))
109
Andre Przywara00eefd92016-10-06 16:54:53 +0100110# Process ERRATA_A53_855873 flag
111$(eval $(call assert_boolean,ERRATA_A53_855873))
112$(eval $(call add_define,ERRATA_A53_855873))
113
Soby Mathew802f8652014-08-14 16:19:29 +0100114# Process ERRATA_A57_806969 flag
115$(eval $(call assert_boolean,ERRATA_A57_806969))
116$(eval $(call add_define,ERRATA_A57_806969))
117
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000118# Process ERRATA_A57_813419 flag
119$(eval $(call assert_boolean,ERRATA_A57_813419))
120$(eval $(call add_define,ERRATA_A57_813419))
121
Soby Mathew802f8652014-08-14 16:19:29 +0100122# Process ERRATA_A57_813420 flag
123$(eval $(call assert_boolean,ERRATA_A57_813420))
124$(eval $(call add_define,ERRATA_A57_813420))
Sandrine Bailleuxa7e0c532016-04-14 13:32:31 +0100125
126# Process ERRATA_A57_826974 flag
127$(eval $(call assert_boolean,ERRATA_A57_826974))
128$(eval $(call add_define,ERRATA_A57_826974))
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +0100129
Sandrine Bailleuxadcbd552016-04-14 14:24:13 +0100130# Process ERRATA_A57_826977 flag
131$(eval $(call assert_boolean,ERRATA_A57_826977))
132$(eval $(call add_define,ERRATA_A57_826977))
133
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +0100134# Process ERRATA_A57_828024 flag
135$(eval $(call assert_boolean,ERRATA_A57_828024))
136$(eval $(call add_define,ERRATA_A57_828024))
Sandrine Bailleux48cbe852016-04-14 14:18:07 +0100137
138# Process ERRATA_A57_829520 flag
139$(eval $(call assert_boolean,ERRATA_A57_829520))
140$(eval $(call add_define,ERRATA_A57_829520))
Sandrine Bailleux143ef1a2016-04-21 11:10:52 +0100141
142# Process ERRATA_A57_833471 flag
143$(eval $(call assert_boolean,ERRATA_A57_833471))
144$(eval $(call add_define,ERRATA_A57_833471))
Douglas Raillardd56fb042017-06-19 15:38:02 +0100145
146# Errata build flags
147ifneq (${ERRATA_A53_843419},0)
Douglas Raillardd0c82732017-06-22 14:44:48 +0100148TF_LDFLAGS_aarch64 += --fix-cortex-a53-843419
Douglas Raillardd56fb042017-06-19 15:38:02 +0100149endif
150
151ifneq (${ERRATA_A53_835769},0)
152TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769
Douglas Raillardd0c82732017-06-22 14:44:48 +0100153TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769
Douglas Raillardd56fb042017-06-19 15:38:02 +0100154endif