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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Antonio Nino Diaz719bf852017-02-23 17:22:58 +00002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6#ifndef __PLAT_ARM_H__
7#define __PLAT_ARM_H__
8
Antonio Nino Diazf09d0032017-04-11 14:04:56 +01009#include <arm_xlat_tables.h>
Dan Handley9df48042015-03-19 18:58:55 +000010#include <bakery_lock.h>
Dan Handley9df48042015-03-19 18:58:55 +000011#include <cassert.h>
12#include <cpu_data.h>
13#include <stdint.h>
Scott Brandenbf404c02017-04-10 11:45:52 -070014#include <utils_def.h>
Dan Handley9df48042015-03-19 18:58:55 +000015
Sandrine Bailleuxf402a522016-09-15 10:09:53 +010016/*******************************************************************************
17 * Forward declarations
18 ******************************************************************************/
19struct bl31_params;
20struct meminfo;
Yatharth Kocharf9a0f162016-09-13 17:07:57 +010021struct image_info;
Sandrine Bailleuxf402a522016-09-15 10:09:53 +010022
Dan Handley9df48042015-03-19 18:58:55 +000023#define ARM_CASSERT_MMAP \
24 CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \
25 <= MAX_MMAP_REGIONS, \
26 assert_max_mmap_regions);
27
28/*
29 * Utility functions common to ARM standard platforms
30 */
Soby Mathewa0fedc42016-06-16 14:52:04 +010031void arm_setup_page_tables(uintptr_t total_base,
32 size_t total_size,
33 uintptr_t code_start,
34 uintptr_t code_limit,
35 uintptr_t rodata_start,
36 uintptr_t rodata_limit
Dan Handley9df48042015-03-19 18:58:55 +000037#if USE_COHERENT_MEM
Soby Mathewa0fedc42016-06-16 14:52:04 +010038 , uintptr_t coh_start,
39 uintptr_t coh_limit
Dan Handley9df48042015-03-19 18:58:55 +000040#endif
41);
42
Soby Mathew074f6932017-02-28 22:58:29 +000043#if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
Dan Handley9df48042015-03-19 18:58:55 +000044/*
45 * Use this macro to instantiate lock before it is used in below
46 * arm_lock_xxx() macros
47 */
Jeenu Viswambharan749d25b2017-08-23 14:12:59 +010048#define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock)
Soby Mathewea26bad2016-11-14 12:25:45 +000049#define ARM_LOCK_GET_INSTANCE (&arm_lock)
Dan Handley9df48042015-03-19 18:58:55 +000050/*
51 * These are wrapper macros to the Coherent Memory Bakery Lock API.
52 */
53#define arm_lock_init() bakery_lock_init(&arm_lock)
54#define arm_lock_get() bakery_lock_get(&arm_lock)
55#define arm_lock_release() bakery_lock_release(&arm_lock)
56
57#else
58
Dan Handley9df48042015-03-19 18:58:55 +000059/*
Yatharth Kochar2694cba2016-11-14 12:00:41 +000060 * Empty macros for all other BL stages other than BL31 and BL32
Dan Handley9df48042015-03-19 18:58:55 +000061 */
Jeenu Viswambharan749d25b2017-08-23 14:12:59 +010062#define ARM_INSTANTIATE_LOCK static int arm_lock __unused
Soby Mathewea26bad2016-11-14 12:25:45 +000063#define ARM_LOCK_GET_INSTANCE 0
Dan Handley9df48042015-03-19 18:58:55 +000064#define arm_lock_init()
65#define arm_lock_get()
66#define arm_lock_release()
67
Soby Mathew074f6932017-02-28 22:58:29 +000068#endif /* defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) */
Dan Handley9df48042015-03-19 18:58:55 +000069
Soby Mathew7799cf72015-04-16 14:49:09 +010070#if ARM_RECOM_STATE_ID_ENC
71/*
72 * Macros used to parse state information from State-ID if it is using the
73 * recommended encoding for State-ID.
74 */
75#define ARM_LOCAL_PSTATE_WIDTH 4
76#define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
77
78/* Macros to construct the composite power state */
79
80/* Make composite power state parameter till power level 0 */
81#if PSCI_EXTENDED_STATE_ID
82
83#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
84 (((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
85#else
86#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
87 (((lvl0_state) << PSTATE_ID_SHIFT) | \
88 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
89 ((type) << PSTATE_TYPE_SHIFT))
90#endif /* __PSCI_EXTENDED_STATE_ID__ */
91
92/* Make composite power state parameter till power level 1 */
93#define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
94 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
95 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
96
Soby Mathewa869de12015-05-08 10:18:59 +010097/* Make composite power state parameter till power level 2 */
98#define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \
99 (((lvl2_state) << (ARM_LOCAL_PSTATE_WIDTH * 2)) | \
100 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
101
Soby Mathew7799cf72015-04-16 14:49:09 +0100102#endif /* __ARM_RECOM_STATE_ID_ENC__ */
103
Jeenu Viswambharanbc1a9292017-02-16 14:55:15 +0000104/* ARM State switch error codes */
105#define STATE_SW_E_PARAM (-2)
106#define STATE_SW_E_DENIED (-3)
Dan Handley9df48042015-03-19 18:58:55 +0000107
Dan Handley9df48042015-03-19 18:58:55 +0000108/* IO storage utility functions */
109void arm_io_setup(void);
110
111/* Security utility functions */
Soby Mathew9c708b52016-02-26 14:23:19 +0000112void arm_tzc400_setup(void);
Vikram Kanigiri510d87b2016-01-29 12:32:58 +0000113struct tzc_dmc500_driver_data;
114void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data);
Dan Handley9df48042015-03-19 18:58:55 +0000115
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100116/* Systimer utility function */
117void arm_configure_sys_timer(void);
118
Dan Handley9df48042015-03-19 18:58:55 +0000119/* PM utility functions */
Soby Mathewfec4eb72015-07-01 16:16:20 +0100120int arm_validate_power_state(unsigned int power_state,
121 psci_power_state_t *req_state);
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100122int arm_validate_psci_entrypoint(uintptr_t entrypoint);
Soby Mathew0d9e8522015-07-15 13:36:24 +0100123int arm_validate_ns_entrypoint(uintptr_t entrypoint);
Soby Mathew9ca28062017-10-11 16:08:58 +0100124void arm_system_pwr_domain_save(void);
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100125void arm_system_pwr_domain_resume(void);
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000126void arm_program_trusted_mailbox(uintptr_t address);
Roberto Vargasa1c16b62017-08-03 09:16:43 +0100127int arm_psci_read_mem_protect(int *val);
128int arm_nor_psci_write_mem_protect(int val);
129void arm_nor_psci_do_mem_protect(void);
130int arm_psci_mem_protect_chk(uintptr_t base, u_register_t length);
Soby Mathewfec4eb72015-07-01 16:16:20 +0100131
132/* Topology utility function */
133int arm_check_mpidr(u_register_t mpidr);
Dan Handley9df48042015-03-19 18:58:55 +0000134
135/* BL1 utility functions */
136void arm_bl1_early_platform_setup(void);
137void arm_bl1_platform_setup(void);
138void arm_bl1_plat_arch_setup(void);
139
140/* BL2 utility functions */
Sandrine Bailleuxf402a522016-09-15 10:09:53 +0100141void arm_bl2_early_platform_setup(struct meminfo *mem_layout);
Dan Handley9df48042015-03-19 18:58:55 +0000142void arm_bl2_platform_setup(void);
143void arm_bl2_plat_arch_setup(void);
144uint32_t arm_get_spsr_for_bl32_entry(void);
145uint32_t arm_get_spsr_for_bl33_entry(void);
Yatharth Kocharede39cb2016-11-14 12:01:04 +0000146int arm_bl2_handle_post_image_load(unsigned int image_id);
Dan Handley9df48042015-03-19 18:58:55 +0000147
Roberto Vargas52207802017-11-17 13:22:18 +0000148/* BL2 at EL3 functions */
149void arm_bl2_el3_early_platform_setup(void);
150void arm_bl2_el3_plat_arch_setup(void);
151
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100152/* BL2U utility functions */
153void arm_bl2u_early_platform_setup(struct meminfo *mem_layout,
154 void *plat_info);
155void arm_bl2u_platform_setup(void);
156void arm_bl2u_plat_arch_setup(void);
157
Juan Castillo7d199412015-12-14 09:35:25 +0000158/* BL31 utility functions */
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100159#if LOAD_IMAGE_V2
160void arm_bl31_early_platform_setup(void *from_bl2,
161 void *plat_params_from_bl2);
162#else
Sandrine Bailleuxf402a522016-09-15 10:09:53 +0100163void arm_bl31_early_platform_setup(struct bl31_params *from_bl2,
Dan Handley9df48042015-03-19 18:58:55 +0000164 void *plat_params_from_bl2);
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100165#endif /* LOAD_IMAGE_V2 */
Dan Handley9df48042015-03-19 18:58:55 +0000166void arm_bl31_platform_setup(void);
Soby Mathew2fd66be2015-12-09 11:38:43 +0000167void arm_bl31_plat_runtime_setup(void);
Dan Handley9df48042015-03-19 18:58:55 +0000168void arm_bl31_plat_arch_setup(void);
169
170/* TSP utility functions */
171void arm_tsp_early_platform_setup(void);
172
Soby Mathew7b754182016-07-11 14:15:27 +0100173/* SP_MIN utility functions */
Yatharth Kochar1c16a4c2016-06-30 14:50:58 +0100174void arm_sp_min_early_platform_setup(void *from_bl2,
175 void *plat_params_from_bl2);
Dimitris Papastamos52323b02017-06-07 13:45:41 +0100176void arm_sp_min_plat_runtime_setup(void);
Soby Mathew7b754182016-07-11 14:15:27 +0100177
Yatharth Kochar736a3bf2015-10-11 14:14:55 +0100178/* FIP TOC validity check */
179int arm_io_is_toc_valid(void);
Dan Handley9df48042015-03-19 18:58:55 +0000180
181/*
182 * Mandatory functions required in ARM standard platforms
183 */
Soby Mathew47e43f22016-02-01 14:04:34 +0000184unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr);
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000185void plat_arm_gic_driver_init(void);
Dan Handley9df48042015-03-19 18:58:55 +0000186void plat_arm_gic_init(void);
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000187void plat_arm_gic_cpuif_enable(void);
188void plat_arm_gic_cpuif_disable(void);
Jeenu Viswambharan78132c92016-12-09 11:12:34 +0000189void plat_arm_gic_redistif_on(void);
190void plat_arm_gic_redistif_off(void);
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000191void plat_arm_gic_pcpu_init(void);
Soby Mathew9ca28062017-10-11 16:08:58 +0100192void plat_arm_gic_save(void);
193void plat_arm_gic_resume(void);
Dan Handley9df48042015-03-19 18:58:55 +0000194void plat_arm_security_setup(void);
195void plat_arm_pwrc_setup(void);
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000196void plat_arm_interconnect_init(void);
197void plat_arm_interconnect_enter_coherency(void);
198void plat_arm_interconnect_exit_coherency(void);
Dan Handley9df48042015-03-19 18:58:55 +0000199
Summer Qin93c812f2017-02-28 16:46:17 +0000200#if ARM_PLAT_MT
201unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);
202#endif
203
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100204#if LOAD_IMAGE_V2
205/*
206 * This function is called after loading SCP_BL2 image and it is used to perform
207 * any platform-specific actions required to handle the SCP firmware.
208 */
209int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info);
210#endif
211
Dan Handley9df48042015-03-19 18:58:55 +0000212/*
213 * Optional functions required in ARM standard platforms
214 */
215void plat_arm_io_setup(void);
216int plat_arm_get_alt_image_source(
Juan Castillo3a66aca2015-04-13 17:36:19 +0100217 unsigned int image_id,
218 uintptr_t *dev_handle,
219 uintptr_t *image_spec);
Soby Mathewfec4eb72015-07-01 16:16:20 +0100220unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
Vikram Kanigiri07035432015-11-12 18:52:34 +0000221const mmap_region_t *plat_arm_get_mmap(void);
Dan Handley9df48042015-03-19 18:58:55 +0000222
Soby Mathew0b4c5a32016-10-21 17:51:22 +0100223/* Allow platform to override psci_pm_ops during runtime */
224const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops);
225
Jeenu Viswambharanbc1a9292017-02-16 14:55:15 +0000226/* Execution state switch in ARM platforms */
227int arm_execution_state_switch(unsigned int smc_fid,
228 uint32_t pc_hi,
229 uint32_t pc_lo,
230 uint32_t cookie_hi,
231 uint32_t cookie_lo,
232 void *handle);
233
Dan Handley9df48042015-03-19 18:58:55 +0000234#endif /* __PLAT_ARM_H__ */