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Varun Wadekarb316e242015-05-19 16:48:04 +05301/*
Anthony Zhou59fd6152017-03-13 15:34:08 +08002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Varun Wadekarb316e242015-05-19 16:48:04 +05303 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Varun Wadekarb316e242015-05-19 16:48:04 +05305 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef PMC_H
8#define PMC_H
Varun Wadekarb316e242015-05-19 16:48:04 +05309
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <lib/mmio.h>
11#include <lib/utils_def.h>
12
Varun Wadekarb316e242015-05-19 16:48:04 +053013#include <tegra_def.h>
14
Anthony Zhouc33c1e32017-03-13 16:47:58 +080015#define PMC_CONFIG U(0x0)
16#define PMC_PWRGATE_STATUS U(0x38)
17#define PMC_PWRGATE_TOGGLE U(0x30)
18#define PMC_TOGGLE_START U(0x100)
19#define PMC_SCRATCH39 U(0x138)
20#define PMC_SECURE_DISABLE2 U(0x2c4)
21#define PMC_SECURE_DISABLE2_WRITE22_ON (U(1) << 28)
22#define PMC_SECURE_SCRATCH22 U(0x338)
23#define PMC_SECURE_DISABLE3 U(0x2d8)
24#define PMC_SECURE_DISABLE3_WRITE34_ON (U(1) << 20)
25#define PMC_SECURE_DISABLE3_WRITE35_ON (U(1) << 22)
26#define PMC_SECURE_SCRATCH34 U(0x368)
27#define PMC_SECURE_SCRATCH35 U(0x36c)
Varun Wadekarb316e242015-05-19 16:48:04 +053028
29static inline uint32_t tegra_pmc_read_32(uint32_t off)
30{
31 return mmio_read_32(TEGRA_PMC_BASE + off);
32}
33
34static inline void tegra_pmc_write_32(uint32_t off, uint32_t val)
35{
36 mmio_write_32(TEGRA_PMC_BASE + off, val);
37}
38
39void tegra_pmc_cpu_setup(uint64_t reset_addr);
40void tegra_pmc_lock_cpu_vectors(void);
Anthony Zhouc33c1e32017-03-13 16:47:58 +080041void tegra_pmc_cpu_on(int32_t cpu);
Varun Wadekarb316e242015-05-19 16:48:04 +053042__dead2 void tegra_pmc_system_reset(void);
43
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000044#endif /* PMC_H */