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Varun Wadekarb316e242015-05-19 16:48:04 +05301/*
Anthony Zhou59fd6152017-03-13 15:34:08 +08002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Varun Wadekarb316e242015-05-19 16:48:04 +05303 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Varun Wadekarb316e242015-05-19 16:48:04 +05305 */
6
7#ifndef __PMC_H__
8#define __PMC_H__
9
10#include <mmio.h>
11#include <tegra_def.h>
Anthony Zhouc33c1e32017-03-13 16:47:58 +080012#include <utils_def.h>
Varun Wadekarb316e242015-05-19 16:48:04 +053013
Anthony Zhouc33c1e32017-03-13 16:47:58 +080014#define PMC_CONFIG U(0x0)
15#define PMC_PWRGATE_STATUS U(0x38)
16#define PMC_PWRGATE_TOGGLE U(0x30)
17#define PMC_TOGGLE_START U(0x100)
18#define PMC_SCRATCH39 U(0x138)
19#define PMC_SECURE_DISABLE2 U(0x2c4)
20#define PMC_SECURE_DISABLE2_WRITE22_ON (U(1) << 28)
21#define PMC_SECURE_SCRATCH22 U(0x338)
22#define PMC_SECURE_DISABLE3 U(0x2d8)
23#define PMC_SECURE_DISABLE3_WRITE34_ON (U(1) << 20)
24#define PMC_SECURE_DISABLE3_WRITE35_ON (U(1) << 22)
25#define PMC_SECURE_SCRATCH34 U(0x368)
26#define PMC_SECURE_SCRATCH35 U(0x36c)
Varun Wadekarb316e242015-05-19 16:48:04 +053027
28static inline uint32_t tegra_pmc_read_32(uint32_t off)
29{
30 return mmio_read_32(TEGRA_PMC_BASE + off);
31}
32
33static inline void tegra_pmc_write_32(uint32_t off, uint32_t val)
34{
35 mmio_write_32(TEGRA_PMC_BASE + off, val);
36}
37
38void tegra_pmc_cpu_setup(uint64_t reset_addr);
39void tegra_pmc_lock_cpu_vectors(void);
Anthony Zhouc33c1e32017-03-13 16:47:58 +080040void tegra_pmc_cpu_on(int32_t cpu);
Varun Wadekarb316e242015-05-19 16:48:04 +053041__dead2 void tegra_pmc_system_reset(void);
42
43#endif /* __PMC_H__ */