| Pankaj Gupta | 988bbb2 | 2020-12-09 14:02:40 +0530 | [diff] [blame] | 1 | # |
| 2 | # Copyright 2018-2021 NXP |
| 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | # |
| 7 | |
| 8 | ############################################################################### |
| 9 | # Flow begins in BL2 at EL3 mode |
| Arvind Ram Prakash | 11b9b49 | 2022-11-22 14:41:00 -0600 | [diff] [blame] | 10 | RESET_TO_BL2 := 1 |
| Pankaj Gupta | 988bbb2 | 2020-12-09 14:02:40 +0530 | [diff] [blame] | 11 | |
| 12 | # Though one core is powered up by default, there are |
| 13 | # platform specific ways to release more than one core |
| 14 | COLD_BOOT_SINGLE_CPU := 0 |
| 15 | |
| 16 | PROGRAMMABLE_RESET_ADDRESS := 1 |
| 17 | |
| 18 | USE_COHERENT_MEM := 0 |
| 19 | |
| 20 | # Use generic OID definition (tbbr_oid.h) |
| 21 | USE_TBBR_DEFS := 1 |
| 22 | |
| 23 | PLAT_XLAT_TABLES_DYNAMIC := 0 |
| 24 | |
| 25 | ENABLE_SVE_FOR_NS := 0 |
| 26 | |
| 27 | ENABLE_STACK_PROTECTOR := 0 |
| 28 | |
| 29 | ERROR_DEPRECATED := 0 |
| 30 | |
| 31 | LS_DISABLE_TRUSTED_WDOG := 1 |
| 32 | |
| 33 | # On ARM platforms, separate the code and read-only data sections to allow |
| 34 | # mapping the former as executable and the latter as execute-never. |
| 35 | SEPARATE_CODE_AND_RODATA := 1 |
| 36 | |
| 37 | # Enable new version of image loading on ARM platforms |
| 38 | LOAD_IMAGE_V2 := 1 |
| 39 | |
| 40 | RCW := "" |
| 41 | |
| 42 | ifneq (${SPD},none) |
| 43 | $(eval $(call add_define, NXP_LOAD_BL32)) |
| 44 | endif |
| 45 | |
| 46 | ############################################################################### |
| 47 | |
| 48 | PLAT_TOOL_PATH := tools/nxp |
| 49 | CREATE_PBL_TOOL_PATH := ${PLAT_TOOL_PATH}/create_pbl |
| 50 | PLAT_SETUP_PATH := ${PLAT_PATH}/common/setup |
| 51 | |
| 52 | PLAT_INCLUDES += -I${PLAT_SETUP_PATH}/include \ |
| 53 | -Iinclude/plat/arm/common \ |
| 54 | -Iinclude/drivers/arm \ |
| 55 | -Iinclude/lib \ |
| 56 | -Iinclude/drivers/io \ |
| 57 | -Ilib/psci |
| 58 | |
| 59 | # Required without TBBR. |
| 60 | # To include the defines for DDR PHY Images. |
| 61 | PLAT_INCLUDES += -Iinclude/common/tbbr |
| 62 | |
| 63 | include ${PLAT_SETUP_PATH}/core.mk |
| 64 | PLAT_BL_COMMON_SOURCES += ${CPU_LIBS} \ |
| 65 | plat/nxp/common/setup/ls_err.c \ |
| 66 | plat/nxp/common/setup/ls_common.c |
| 67 | |
| 68 | ifneq (${ENABLE_STACK_PROTECTOR},0) |
| 69 | PLAT_BL_COMMON_SOURCES += ${PLAT_SETUP_PATH}/ls_stack_protector.c |
| 70 | endif |
| 71 | |
| 72 | include lib/xlat_tables_v2/xlat_tables.mk |
| 73 | |
| 74 | PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} |
| 75 | |
| 76 | BL2_SOURCES += drivers/io/io_fip.c \ |
| 77 | drivers/io/io_memmap.c \ |
| 78 | drivers/io/io_storage.c \ |
| 79 | common/desc_image_load.c \ |
| 80 | plat/nxp/common/setup/ls_image_load.c \ |
| 81 | plat/nxp/common/setup/ls_io_storage.c \ |
| 82 | plat/nxp/common/setup/ls_bl2_el3_setup.c \ |
| 83 | plat/nxp/common/setup/${ARCH}/ls_bl2_mem_params_desc.c |
| 84 | |
| 85 | BL31_SOURCES += plat/nxp/common/setup/ls_bl31_setup.c \ |
| 86 | |
| 87 | ifeq (${LS_EL3_INTERRUPT_HANDLER}, yes) |
| 88 | $(eval $(call add_define, LS_EL3_INTERRUPT_HANDLER)) |
| 89 | BL31_SOURCES += plat/nxp/common/setup/ls_interrupt_mgmt.c |
| 90 | endif |
| 91 | |
| 92 | ifeq (${TEST_BL31}, 1) |
| 93 | BL31_SOURCES += ${TEST_SOURCES} |
| 94 | endif |
| 95 | |
| 96 | # Verify build config |
| 97 | # ------------------- |
| 98 | |
| 99 | ifneq (${LOAD_IMAGE_V2}, 1) |
| 100 | $(error Error: Layerscape needs LOAD_IMAGE_V2=1) |
| 101 | else |
| 102 | $(eval $(call add_define,LOAD_IMAGE_V2)) |
| 103 | endif |
| 104 | |
| 105 | include $(CREATE_PBL_TOOL_PATH)/create_pbl.mk |