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Benjamin Faira42b61b2016-10-14 01:13:46 +00001/*
2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Benjamin Faira42b61b2016-10-14 01:13:46 +00007#include <assert.h>
Benjamin Faira42b61b2016-10-14 01:13:46 +00008#include <stdbool.h>
9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <arch_helpers.h>
11#include <common/debug.h>
12#include <lib/el3_runtime/cpu_data.h>
13#include <lib/psci/psci.h>
14#include <plat/common/platform.h>
15
16#include <k3_gicv3.h>
Andrew F. Davis60541b12018-05-24 11:15:42 -050017#include <ti_sci.h>
18
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000019/* Need to flush psci internal locks before shutdown or their values are lost */
20#include "../../../../lib/psci/psci_private.h"
21
Benjamin Faira42b61b2016-10-14 01:13:46 +000022#define STUB() ERROR("stub %s called\n", __func__)
23
24uintptr_t k3_sec_entrypoint;
25
26static void k3_cpu_standby(plat_local_state_t cpu_state)
27{
Andrew F. Davisae40e692018-06-25 12:36:25 -050028 unsigned int scr;
29
30 scr = read_scr_el3();
31 /* Enable the Non secure interrupt to wake the CPU */
32 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT);
33 isb();
34 /* dsb is good practice before using wfi to enter low power states */
Benjamin Faira42b61b2016-10-14 01:13:46 +000035 dsb();
Andrew F. Davisae40e692018-06-25 12:36:25 -050036 /* Enter standby state */
Benjamin Faira42b61b2016-10-14 01:13:46 +000037 wfi();
Andrew F. Davisae40e692018-06-25 12:36:25 -050038 /* Restore SCR */
39 write_scr_el3(scr);
Benjamin Faira42b61b2016-10-14 01:13:46 +000040}
41
42static int k3_pwr_domain_on(u_register_t mpidr)
43{
Andrew F. Davis60541b12018-05-24 11:15:42 -050044 int core_id, proc, device, ret;
45
46 core_id = plat_core_pos_by_mpidr(mpidr);
47 if (core_id < 0) {
48 ERROR("Could not get target core id: %d\n", core_id);
49 return PSCI_E_INTERN_FAIL;
50 }
51
52 proc = PLAT_PROC_START_ID + core_id;
53 device = PLAT_PROC_DEVICE_START_ID + core_id;
54
55 ret = ti_sci_proc_request(proc);
56 if (ret) {
57 ERROR("Request for processor failed: %d\n", ret);
58 return PSCI_E_INTERN_FAIL;
59 }
60
61 ret = ti_sci_proc_set_boot_cfg(proc, k3_sec_entrypoint, 0, 0);
62 if (ret) {
63 ERROR("Request to set core boot address failed: %d\n", ret);
64 return PSCI_E_INTERN_FAIL;
65 }
66
67 ret = ti_sci_device_get(device);
68 if (ret) {
69 ERROR("Request to start core failed: %d\n", ret);
70 return PSCI_E_INTERN_FAIL;
71 }
Benjamin Faira42b61b2016-10-14 01:13:46 +000072
Andrew F. Davis60541b12018-05-24 11:15:42 -050073 ret = ti_sci_proc_release(proc);
74 if (ret) {
75 /* this is not fatal */
76 WARN("Could not release processor control: %d\n", ret);
77 }
Benjamin Faira42b61b2016-10-14 01:13:46 +000078
79 return PSCI_E_SUCCESS;
80}
81
82void k3_pwr_domain_off(const psci_power_state_t *target_state)
83{
Andrew F. Davis7804b272018-08-09 10:01:53 -050084 int core_id, device, ret;
85
Benjamin Faira42b61b2016-10-14 01:13:46 +000086 /* Prevent interrupts from spuriously waking up this cpu */
87 k3_gic_cpuif_disable();
88
Andrew F. Davis7804b272018-08-09 10:01:53 -050089 core_id = plat_my_core_pos();
90 device = PLAT_PROC_DEVICE_START_ID + core_id;
91
92 ret = ti_sci_device_put(device);
93 if (ret) {
94 ERROR("Request to stop core failed: %d\n", ret);
95 return;
96 }
Benjamin Faira42b61b2016-10-14 01:13:46 +000097}
98
99void k3_pwr_domain_on_finish(const psci_power_state_t *target_state)
100{
101 /* TODO: Indicate to System firmware about completion */
102
103 k3_gic_pcpu_init();
104 k3_gic_cpuif_enable();
105}
106
Andrew F. Davis7c461d72018-10-12 15:37:04 -0500107static void __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
108 *target_state)
109{
110 flush_cpu_data(psci_svc_cpu_data);
111 flush_dcache_range((uintptr_t) psci_locks, sizeof(psci_locks));
112 psci_power_down_wfi();
113}
114
Benjamin Faira42b61b2016-10-14 01:13:46 +0000115static void __dead2 k3_system_reset(void)
116{
Andrew F. Davis6a60d022018-05-24 11:15:42 -0500117 /* Send the system reset request to system firmware */
118 ti_sci_core_reboot();
Benjamin Faira42b61b2016-10-14 01:13:46 +0000119
120 while (true)
121 wfi();
122}
123
124static int k3_validate_power_state(unsigned int power_state,
125 psci_power_state_t *req_state)
126{
127 /* TODO: perform the proper validation */
128
129 return PSCI_E_SUCCESS;
130}
131
132static int k3_validate_ns_entrypoint(uintptr_t entrypoint)
133{
134 /* TODO: perform the proper validation */
135
136 return PSCI_E_SUCCESS;
137}
138
139static const plat_psci_ops_t k3_plat_psci_ops = {
140 .cpu_standby = k3_cpu_standby,
141 .pwr_domain_on = k3_pwr_domain_on,
142 .pwr_domain_off = k3_pwr_domain_off,
143 .pwr_domain_on_finish = k3_pwr_domain_on_finish,
Andrew F. Davis7c461d72018-10-12 15:37:04 -0500144 .pwr_domain_pwr_down_wfi = k3_pwr_domain_pwr_down_wfi,
Benjamin Faira42b61b2016-10-14 01:13:46 +0000145 .system_reset = k3_system_reset,
146 .validate_power_state = k3_validate_power_state,
147 .validate_ns_entrypoint = k3_validate_ns_entrypoint
148};
149
150int plat_setup_psci_ops(uintptr_t sec_entrypoint,
151 const plat_psci_ops_t **psci_ops)
152{
153 k3_sec_entrypoint = sec_entrypoint;
154
155 *psci_ops = &k3_plat_psci_ops;
156
157 return 0;
158}