Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Dan Handley | e83b0ca | 2014-01-14 18:17:09 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 31 | #include <arch_helpers.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 32 | #include <assert.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 33 | #include <bl_common.h> |
Vikram Kanigiri | 3ff77de | 2014-03-25 17:35:26 +0000 | [diff] [blame] | 34 | #include <console.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 35 | #include <platform.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 36 | #include <platform_def.h> |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 37 | #include <string.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 38 | #include "fvp_def.h" |
| 39 | #include "fvp_private.h" |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 40 | |
| 41 | /******************************************************************************* |
| 42 | * Declarations of linker defined symbols which will help us find the layout |
| 43 | * of trusted SRAM |
| 44 | ******************************************************************************/ |
Sandrine Bailleux | 8d69a03 | 2013-11-27 09:38:52 +0000 | [diff] [blame] | 45 | extern unsigned long __RO_START__; |
| 46 | extern unsigned long __RO_END__; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 47 | |
Sandrine Bailleux | 8d69a03 | 2013-11-27 09:38:52 +0000 | [diff] [blame] | 48 | extern unsigned long __COHERENT_RAM_START__; |
| 49 | extern unsigned long __COHERENT_RAM_END__; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 50 | |
Sandrine Bailleux | 8d69a03 | 2013-11-27 09:38:52 +0000 | [diff] [blame] | 51 | /* |
| 52 | * The next 2 constants identify the extents of the code & RO data region. |
| 53 | * These addresses are used by the MMU setup code and therefore they must be |
| 54 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 55 | * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. |
| 56 | */ |
| 57 | #define BL2_RO_BASE (unsigned long)(&__RO_START__) |
| 58 | #define BL2_RO_LIMIT (unsigned long)(&__RO_END__) |
| 59 | |
| 60 | /* |
| 61 | * The next 2 constants identify the extents of the coherent memory region. |
| 62 | * These addresses are used by the MMU setup code and therefore they must be |
| 63 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 64 | * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to |
| 65 | * page-aligned addresses. |
| 66 | */ |
| 67 | #define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) |
| 68 | #define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 69 | |
| 70 | /* Pointer to memory visible to both BL2 and BL31 for passing data */ |
| 71 | extern unsigned char **bl2_el_change_mem_ptr; |
| 72 | |
| 73 | /* Data structure which holds the extents of the trusted SRAM for BL2 */ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 74 | static meminfo_t bl2_tzram_layout |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 75 | __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), |
Sandrine Bailleux | 204aa03 | 2013-10-28 15:14:00 +0000 | [diff] [blame] | 76 | section("tzfw_coherent_mem"))); |
Achin Gupta | e4d084e | 2014-02-19 17:18:23 +0000 | [diff] [blame] | 77 | |
| 78 | /******************************************************************************* |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 79 | * Reference to structures which holds the arguments which need to be passed |
Achin Gupta | e4d084e | 2014-02-19 17:18:23 +0000 | [diff] [blame] | 80 | * to BL31 |
| 81 | ******************************************************************************/ |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 82 | static bl31_params_t *bl2_to_bl31_params; |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 83 | static entry_point_info_t *bl31_ep_info; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 84 | |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 85 | meminfo_t *bl2_plat_sec_mem_layout(void) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 86 | { |
Sandrine Bailleux | ee12f6f | 2013-11-28 14:55:58 +0000 | [diff] [blame] | 87 | return &bl2_tzram_layout; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 88 | } |
| 89 | |
Achin Gupta | e4d084e | 2014-02-19 17:18:23 +0000 | [diff] [blame] | 90 | /******************************************************************************* |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 91 | * This function assigns a pointer to the memory that the platform has kept |
| 92 | * aside to pass platform specific and trusted firmware related information |
| 93 | * to BL31. This memory is allocated by allocating memory to |
| 94 | * bl2_to_bl31_params_mem_t structure which is a superset of all the |
| 95 | * structure whose information is passed to BL31 |
| 96 | * NOTE: This function should be called only once and should be done |
| 97 | * before generating params to BL31 |
| 98 | ******************************************************************************/ |
| 99 | bl31_params_t *bl2_plat_get_bl31_params(void) |
| 100 | { |
| 101 | bl2_to_bl31_params_mem_t *bl31_params_mem; |
| 102 | |
Sandrine Bailleux | e701e30 | 2014-05-20 17:28:25 +0100 | [diff] [blame] | 103 | #if TSP_RAM_LOCATION_ID == TSP_IN_TZDRAM |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 104 | /* |
| 105 | * Ensure that the secure DRAM memory used for passing BL31 arguments |
| 106 | * does not overlap with the BL32_BASE. |
| 107 | */ |
| 108 | assert(BL32_BASE > PARAMS_BASE + sizeof(bl2_to_bl31_params_mem_t)); |
Sandrine Bailleux | e701e30 | 2014-05-20 17:28:25 +0100 | [diff] [blame] | 109 | #endif |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 110 | |
| 111 | /* |
| 112 | * Allocate the memory for all the arguments that needs to |
| 113 | * be passed to BL31 |
| 114 | */ |
| 115 | bl31_params_mem = (bl2_to_bl31_params_mem_t *)PARAMS_BASE; |
| 116 | memset((void *)PARAMS_BASE, 0, sizeof(bl2_to_bl31_params_mem_t)); |
| 117 | |
| 118 | /* Assign memory for TF related information */ |
| 119 | bl2_to_bl31_params = &bl31_params_mem->bl31_params; |
| 120 | SET_PARAM_HEAD(bl2_to_bl31_params, PARAM_BL31, VERSION_1, 0); |
| 121 | |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 122 | /* Fill BL31 related information */ |
| 123 | bl31_ep_info = &bl31_params_mem->bl31_ep_info; |
| 124 | bl2_to_bl31_params->bl31_image_info = &bl31_params_mem->bl31_image_info; |
| 125 | SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info, PARAM_IMAGE_BINARY, |
| 126 | VERSION_1, 0); |
| 127 | |
| 128 | /* Fill BL32 related information if it exists */ |
| 129 | if (BL32_BASE) { |
| 130 | bl2_to_bl31_params->bl32_ep_info = |
| 131 | &bl31_params_mem->bl32_ep_info; |
| 132 | SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, |
| 133 | PARAM_EP, VERSION_1, 0); |
| 134 | bl2_to_bl31_params->bl32_image_info = |
| 135 | &bl31_params_mem->bl32_image_info; |
| 136 | SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info, |
| 137 | PARAM_IMAGE_BINARY, |
| 138 | VERSION_1, 0); |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 139 | } |
| 140 | |
| 141 | /* Fill BL33 related information */ |
| 142 | bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem->bl33_ep_info; |
| 143 | SET_PARAM_HEAD(bl2_to_bl31_params->bl33_ep_info, |
| 144 | PARAM_EP, VERSION_1, 0); |
| 145 | bl2_to_bl31_params->bl33_image_info = &bl31_params_mem->bl33_image_info; |
| 146 | SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info, PARAM_IMAGE_BINARY, |
| 147 | VERSION_1, 0); |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 148 | |
| 149 | return bl2_to_bl31_params; |
| 150 | } |
| 151 | |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 152 | |
| 153 | /******************************************************************************* |
| 154 | * This function returns a pointer to the shared memory that the platform |
| 155 | * has kept to point to entry point information of BL31 to BL2 |
Achin Gupta | e4d084e | 2014-02-19 17:18:23 +0000 | [diff] [blame] | 156 | ******************************************************************************/ |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 157 | struct entry_point_info *bl2_plat_get_bl31_ep_info(void) |
Harry Liebel | 561cd33 | 2014-02-14 14:42:48 +0000 | [diff] [blame] | 158 | { |
Andrew Thoelke | a55566d | 2014-05-28 22:22:55 +0100 | [diff] [blame] | 159 | #if DEBUG |
| 160 | bl31_ep_info->args.arg1 = FVP_BL31_PLAT_PARAM_VAL; |
| 161 | #endif |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 162 | return bl31_ep_info; |
Harry Liebel | 561cd33 | 2014-02-14 14:42:48 +0000 | [diff] [blame] | 163 | } |
| 164 | |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 165 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 166 | /******************************************************************************* |
| 167 | * BL1 has passed the extents of the trusted SRAM that should be visible to BL2 |
| 168 | * in x0. This memory layout is sitting at the base of the free trusted SRAM. |
| 169 | * Copy it to a safe loaction before its reclaimed by later BL2 functionality. |
| 170 | ******************************************************************************/ |
Vikram Kanigiri | a3a5e4a | 2014-05-15 18:27:15 +0100 | [diff] [blame] | 171 | void bl2_early_platform_setup(meminfo_t *mem_layout) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 172 | { |
Vikram Kanigiri | 3684abf | 2014-03-27 14:33:15 +0000 | [diff] [blame] | 173 | /* Initialize the console to provide early debug support */ |
| 174 | console_init(PL011_UART0_BASE); |
| 175 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 176 | /* Setup the BL2 memory layout */ |
| 177 | bl2_tzram_layout.total_base = mem_layout->total_base; |
| 178 | bl2_tzram_layout.total_size = mem_layout->total_size; |
| 179 | bl2_tzram_layout.free_base = mem_layout->free_base; |
| 180 | bl2_tzram_layout.free_size = mem_layout->free_size; |
| 181 | bl2_tzram_layout.attr = mem_layout->attr; |
| 182 | bl2_tzram_layout.next = 0; |
| 183 | |
| 184 | /* Initialize the platform config for future decision making */ |
Dan Handley | ea45157 | 2014-05-15 14:53:30 +0100 | [diff] [blame] | 185 | fvp_config_setup(); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 186 | } |
| 187 | |
| 188 | /******************************************************************************* |
Sandrine Bailleux | 942f405 | 2013-11-19 17:14:22 +0000 | [diff] [blame] | 189 | * Perform platform specific setup. For now just initialize the memory location |
| 190 | * to use for passing arguments to BL31. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 191 | ******************************************************************************/ |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 192 | void bl2_platform_setup(void) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 193 | { |
Harry Liebel | cef9339 | 2014-04-01 19:27:38 +0100 | [diff] [blame] | 194 | /* |
| 195 | * Do initial security configuration to allow DRAM/device access. On |
| 196 | * Base FVP only DRAM security is programmable (via TrustZone), but |
| 197 | * other platforms might have more programmable security devices |
| 198 | * present. |
| 199 | */ |
Dan Handley | ea45157 | 2014-05-15 14:53:30 +0100 | [diff] [blame] | 200 | fvp_security_setup(); |
Harry Liebel | cef9339 | 2014-04-01 19:27:38 +0100 | [diff] [blame] | 201 | |
James Morrissey | 9d72b4e | 2014-02-10 17:04:32 +0000 | [diff] [blame] | 202 | /* Initialise the IO layer and register platform IO devices */ |
Dan Handley | ea45157 | 2014-05-15 14:53:30 +0100 | [diff] [blame] | 203 | fvp_io_setup(); |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 204 | } |
Achin Gupta | a3050ed | 2014-02-19 17:52:35 +0000 | [diff] [blame] | 205 | |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 206 | /* Flush the TF params and the TF plat params */ |
| 207 | void bl2_plat_flush_bl31_params(void) |
| 208 | { |
| 209 | flush_dcache_range((unsigned long)PARAMS_BASE, \ |
| 210 | sizeof(bl2_to_bl31_params_mem_t)); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 211 | } |
| 212 | |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 213 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 214 | /******************************************************************************* |
| 215 | * Perform the very early platform specific architectural setup here. At the |
| 216 | * moment this is only intializes the mmu in a quick and dirty way. |
| 217 | ******************************************************************************/ |
| 218 | void bl2_plat_arch_setup() |
| 219 | { |
Dan Handley | ea45157 | 2014-05-15 14:53:30 +0100 | [diff] [blame] | 220 | fvp_configure_mmu_el1(bl2_tzram_layout.total_base, |
| 221 | bl2_tzram_layout.total_size, |
| 222 | BL2_RO_BASE, |
| 223 | BL2_RO_LIMIT, |
| 224 | BL2_COHERENT_RAM_BASE, |
| 225 | BL2_COHERENT_RAM_LIMIT); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 226 | } |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 227 | |
| 228 | /******************************************************************************* |
| 229 | * Before calling this function BL31 is loaded in memory and its entrypoint |
| 230 | * is set by load_image. This is a placeholder for the platform to change |
| 231 | * the entrypoint of BL31 and set SPSR and security state. |
| 232 | * On FVP we are only setting the security state, entrypoint |
| 233 | ******************************************************************************/ |
| 234 | void bl2_plat_set_bl31_ep_info(image_info_t *bl31_image_info, |
| 235 | entry_point_info_t *bl31_ep_info) |
| 236 | { |
| 237 | SET_SECURITY_STATE(bl31_ep_info->h.attr, SECURE); |
| 238 | bl31_ep_info->spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, |
| 239 | DISABLE_ALL_EXCEPTIONS); |
| 240 | } |
| 241 | |
| 242 | |
| 243 | /******************************************************************************* |
| 244 | * Before calling this function BL32 is loaded in memory and its entrypoint |
| 245 | * is set by load_image. This is a placeholder for the platform to change |
| 246 | * the entrypoint of BL32 and set SPSR and security state. |
| 247 | * On FVP we are only setting the security state, entrypoint |
| 248 | ******************************************************************************/ |
| 249 | void bl2_plat_set_bl32_ep_info(image_info_t *bl32_image_info, |
| 250 | entry_point_info_t *bl32_ep_info) |
| 251 | { |
Vikram Kanigiri | 9637745 | 2014-04-24 11:02:16 +0100 | [diff] [blame] | 252 | fvp_set_bl32_ep_info(bl32_ep_info); |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | /******************************************************************************* |
| 256 | * Before calling this function BL33 is loaded in memory and its entrypoint |
| 257 | * is set by load_image. This is a placeholder for the platform to change |
| 258 | * the entrypoint of BL33 and set SPSR and security state. |
| 259 | * On FVP we are only setting the security state, entrypoint |
| 260 | ******************************************************************************/ |
| 261 | void bl2_plat_set_bl33_ep_info(image_info_t *image, |
| 262 | entry_point_info_t *bl33_ep_info) |
| 263 | { |
Vikram Kanigiri | 9637745 | 2014-04-24 11:02:16 +0100 | [diff] [blame] | 264 | fvp_set_bl33_ep_info(bl33_ep_info); |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 265 | } |
Vikram Kanigiri | d8c9d26 | 2014-05-16 18:48:12 +0100 | [diff] [blame] | 266 | |
| 267 | |
| 268 | /******************************************************************************* |
| 269 | * Populate the extents of memory available for loading BL32 |
| 270 | ******************************************************************************/ |
| 271 | void bl2_plat_get_bl32_meminfo(meminfo_t *bl32_meminfo) |
| 272 | { |
| 273 | /* |
| 274 | * Populate the extents of memory available for loading BL32. |
Vikram Kanigiri | d8c9d26 | 2014-05-16 18:48:12 +0100 | [diff] [blame] | 275 | */ |
| 276 | bl32_meminfo->total_base = BL32_BASE; |
| 277 | bl32_meminfo->free_base = BL32_BASE; |
| 278 | bl32_meminfo->total_size = |
Sandrine Bailleux | 5ac3cc9 | 2014-05-20 17:22:24 +0100 | [diff] [blame] | 279 | (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE; |
Vikram Kanigiri | d8c9d26 | 2014-05-16 18:48:12 +0100 | [diff] [blame] | 280 | bl32_meminfo->free_size = |
Sandrine Bailleux | 5ac3cc9 | 2014-05-20 17:22:24 +0100 | [diff] [blame] | 281 | (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE; |
Vikram Kanigiri | d8c9d26 | 2014-05-16 18:48:12 +0100 | [diff] [blame] | 282 | bl32_meminfo->attr = BOT_LOAD; |
| 283 | bl32_meminfo->next = 0; |
| 284 | } |
| 285 | |
| 286 | |
| 287 | /******************************************************************************* |
| 288 | * Populate the extents of memory available for loading BL33 |
| 289 | ******************************************************************************/ |
| 290 | void bl2_plat_get_bl33_meminfo(meminfo_t *bl33_meminfo) |
| 291 | { |
| 292 | bl33_meminfo->total_base = DRAM_BASE; |
Juan Castillo | 7055ca4 | 2014-05-16 15:33:15 +0100 | [diff] [blame] | 293 | bl33_meminfo->total_size = DRAM_SIZE - DRAM1_SEC_SIZE; |
Vikram Kanigiri | d8c9d26 | 2014-05-16 18:48:12 +0100 | [diff] [blame] | 294 | bl33_meminfo->free_base = DRAM_BASE; |
Juan Castillo | 7055ca4 | 2014-05-16 15:33:15 +0100 | [diff] [blame] | 295 | bl33_meminfo->free_size = DRAM_SIZE - DRAM1_SEC_SIZE; |
Vikram Kanigiri | d8c9d26 | 2014-05-16 18:48:12 +0100 | [diff] [blame] | 296 | bl33_meminfo->attr = 0; |
| 297 | bl33_meminfo->attr = 0; |
| 298 | } |