refactor(tc): move SCMI clock DT binding into tc-base.dtsi
As SCMI clock DT bindings are common for TC platforms, move them into
'tc-base.dtsi'.
As a result, the file 'tc_vers.dtsi' is empty, so removes it.
Change-Id: Iaa7219bbbde8458dcfe01de7ad6c277a960357c5
Signed-off-by: Leo Yan <leo.yan@arm.com>
diff --git a/fdts/tc-base.dtsi b/fdts/tc-base.dtsi
index 7d5a8dd..15e4a00 100644
--- a/fdts/tc-base.dtsi
+++ b/fdts/tc-base.dtsi
@@ -4,7 +4,37 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#include "tc_vers.dtsi"
+/* If SCMI power domain control is enabled */
+#if TC_SCMI_PD_CTRL_EN
+#define GPU_SCMI_PD_IDX (PLAT_MAX_CPUS_PER_CLUSTER + 1)
+#define DPU_SCMI_PD_IDX (PLAT_MAX_CPUS_PER_CLUSTER + 2)
+#endif /* TC_SCMI_PD_CTRL_EN */
+
+/* Use SCMI controlled clocks */
+#if TC_DPU_USE_SCMI_CLK
+#define DPU_CLK_ATTR1 \
+ clocks = <&scmi_clk 0>; \
+ clock-names = "aclk"
+
+#define DPU_CLK_ATTR2 \
+ clocks = <&scmi_clk 1>; \
+ clock-names = "pxclk"
+
+#define DPU_CLK_ATTR3 \
+ clocks = <&scmi_clk 2>; \
+ clock-names = "pxclk" \
+/* Use fixed clocks */
+#else /* !TC_DPU_USE_SCMI_CLK */
+#define DPU_CLK_ATTR1 \
+ clocks = <&dpu_aclk>; \
+ clock-names = "aclk"
+
+#define DPU_CLK_ATTR2 \
+ clocks = <&dpu_pixel_clk>, <&dpu_aclk>; \
+ clock-names = "pxclk", "aclk"
+
+#define DPU_CLK_ATTR3 DPU_CLK_ATTR2
+#endif /* !TC_DPU_USE_SCMI_CLK */
/ {
compatible = "arm,tc";
@@ -354,6 +384,22 @@
clock-names = "uartclk", "apb_pclk";
status = "okay";
};
+
+#if !TC_DPU_USE_SCMI_CLK
+ dpu_aclk: dpu_aclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <VENCODER_TIMING_CLK>;
+ clock-output-names = "fpga:dpu_aclk";
+ };
+
+ dpu_pixel_clk: dpu-pixel-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <VENCODER_TIMING_CLK>;
+ clock-output-names = "pxclk";
+ };
+#endif /* !TC_DPU_USE_SCMI_CLK */
vencoder {
compatible = "drm,virtual-encoder";
diff --git a/fdts/tc_vers.dtsi b/fdts/tc_vers.dtsi
deleted file mode 100644
index 2b8675e..0000000
--- a/fdts/tc_vers.dtsi
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2023-2024, Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/* If SCMI power domain control is enabled */
-#if TC_SCMI_PD_CTRL_EN
-#define GPU_SCMI_PD_IDX (PLAT_MAX_CPUS_PER_CLUSTER + 1)
-#define DPU_SCMI_PD_IDX (PLAT_MAX_CPUS_PER_CLUSTER + 2)
-#endif /* TC_SCMI_PD_CTRL_EN */
-
-/* Use SCMI controlled clocks */
-#if TC_DPU_USE_SCMI_CLK
-#define DPU_CLK_ATTR1 \
- clocks = <&scmi_clk 0>; \
- clock-names = "aclk"
-
-#define DPU_CLK_ATTR2 \
- clocks = <&scmi_clk 1>; \
- clock-names = "pxclk"
-
-#define DPU_CLK_ATTR3 \
- clocks = <&scmi_clk 2>; \
- clock-names = "pxclk" \
-/* Use fixed clocks */
-#else /* !TC_DPU_USE_SCMI_CLK */
-#define DPU_CLK_ATTR1 \
- clocks = <&dpu_aclk>; \
- clock-names = "aclk"
-
-#define DPU_CLK_ATTR2 \
- clocks = <&dpu_pixel_clk>, <&dpu_aclk>; \
- clock-names = "pxclk", "aclk"
-
-#define DPU_CLK_ATTR3 DPU_CLK_ATTR2
-#endif /* !TC_DPU_USE_SCMI_CLK */
-
-/ {
-#if !TC_DPU_USE_SCMI_CLK
- dpu_aclk: dpu_aclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <VENCODER_TIMING_CLK>;
- clock-output-names = "fpga:dpu_aclk";
- };
-
- dpu_pixel_clk: dpu-pixel-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <VENCODER_TIMING_CLK>;
- clock-output-names = "pxclk";
- };
-#endif /* !TC_DPU_USE_SCMI_CLK */
-};