| /* |
| * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * |
| * Redistributions of source code must retain the above copyright notice, this |
| * list of conditions and the following disclaimer. |
| * |
| * Redistributions in binary form must reproduce the above copyright notice, |
| * this list of conditions and the following disclaimer in the documentation |
| * and/or other materials provided with the distribution. |
| * |
| * Neither the name of ARM nor the names of its contributors may be used |
| * to endorse or promote products derived from this software without specific |
| * prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| * POSSIBILITY OF SUCH DAMAGE. |
| */ |
| |
| #ifndef __PLATFORM_DEF_H__ |
| #define __PLATFORM_DEF_H__ |
| |
| #include <arch.h> |
| #include <common_def.h> |
| #include <tegra_def.h> |
| |
| /******************************************************************************* |
| * Generic platform constants |
| ******************************************************************************/ |
| |
| /* Size of cacheable stacks */ |
| #ifdef IMAGE_BL31 |
| #define PLATFORM_STACK_SIZE 0x400 |
| #endif |
| |
| #define TEGRA_PRIMARY_CPU 0x0 |
| |
| #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2 |
| #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \ |
| PLATFORM_MAX_CPUS_PER_CLUSTER) |
| #define PLAT_NUM_PWR_DOMAINS (PLATFORM_CORE_COUNT + \ |
| PLATFORM_CLUSTER_COUNT + 1) |
| |
| /******************************************************************************* |
| * Platform console related constants |
| ******************************************************************************/ |
| #define TEGRA_CONSOLE_BAUDRATE 115200 |
| #define TEGRA_BOOT_UART_CLK_IN_HZ 408000000 |
| |
| /******************************************************************************* |
| * Platform memory map related constants |
| ******************************************************************************/ |
| /* Size of trusted dram */ |
| #define TZDRAM_SIZE 0x00400000 |
| #define TZDRAM_END (TZDRAM_BASE + TZDRAM_SIZE) |
| |
| /******************************************************************************* |
| * BL31 specific defines. |
| ******************************************************************************/ |
| #define BL31_SIZE 0x40000 |
| #define BL31_BASE TZDRAM_BASE |
| #define BL31_LIMIT (TZDRAM_BASE + BL31_SIZE - 1) |
| #define BL32_BASE (TZDRAM_BASE + BL31_SIZE) |
| #define BL32_LIMIT TZDRAM_END |
| |
| /******************************************************************************* |
| * Platform specific page table and MMU setup constants |
| ******************************************************************************/ |
| #define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 35) |
| #define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 35) |
| |
| /******************************************************************************* |
| * Some data must be aligned on the biggest cache line size in the platform. |
| * This is known only to the platform as it might have a combination of |
| * integrated and external caches. |
| ******************************************************************************/ |
| #define CACHE_WRITEBACK_SHIFT 6 |
| #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) |
| |
| #endif /* __PLATFORM_DEF_H__ */ |