| developer | cfd7460 | 2022-10-19 17:09:54 +0800 | [diff] [blame] | 1 | From 7280bc1aba9fa30d3a16660c8afba8656d831cb8 Mon Sep 17 00:00:00 2001 |
| 2 | From: Peter Chiu <chui-hao.chiu@mediatek.com> |
| 3 | Date: Wed, 19 Oct 2022 16:04:10 +0800 |
| 4 | Subject: [PATCH] mt76: connac: update nss calculation in txs |
| 5 | |
| 6 | The nss is nsts divided by 2 when stbc is 1. |
| 7 | |
| 8 | Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> |
| 9 | --- |
| 10 | mt76_connac_mac.c | 6 +++++- |
| 11 | 1 file changed, 5 insertions(+), 1 deletion(-) |
| 12 | |
| 13 | diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c |
| 14 | index 8b7ec64a..fd60123f 100644 |
| 15 | --- a/mt76_connac_mac.c |
| 16 | +++ b/mt76_connac_mac.c |
| 17 | @@ -567,7 +567,7 @@ bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid, |
| 18 | struct mt76_phy *mphy; |
| 19 | struct rate_info rate = {}; |
| 20 | bool cck = false; |
| 21 | - u32 txrate, txs, mode; |
| 22 | + u32 txrate, txs, mode, stbc; |
| 23 | |
| 24 | txs = le32_to_cpu(txs_data[0]); |
| 25 | |
| 26 | @@ -587,6 +587,10 @@ bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid, |
| 27 | |
| 28 | rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate); |
| 29 | rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1; |
| 30 | + stbc = FIELD_GET(MT_TX_RATE_STBC, txrate); |
| 31 | + |
| 32 | + if (stbc && rate.nss > 1) |
| 33 | + rate.nss >>= 1; |
| 34 | |
| 35 | if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss)) |
| 36 | stats->tx_nss[rate.nss - 1]++; |
| 37 | -- |
| 38 | 2.18.0 |
| 39 | |